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US 11,380,372 B1Granted
Transferring data between DRAM and SRAM
AssigneeMicron Technology, Inc.
InventorsTimothy P. Finkbeiner, Troy A. Manning, Troy D. Larsen, Glen E. Hush
Life of this patent
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Abstract
Methods and devices related to transferring data between DRAM and SRAM. One method includes activating a first portion of a dynamic random access memory (DRAM), reading data from the first portion of the DRAM, latching the data from the first portion of the DRAM in one or more sense amplifiers, and writing the data from the one or more sense amplifiers to a first portion of a static random access memory (SRAM).
Claims22
A method for performing a data transfer operation, comprising:
- activating a first portion of a dynamic random access memory (DRAM);
- reading data from the first portion of the DRAM;
- latching the data from the first portion of the DRAM in a first sense amplifier of one or more sense amplifiers;
- and
- writing the data from the first sense amplifier to a first portion of a static random access memory (SRAM) in response to receiving a DRAM command at the SRAM.
2 more elements
A method, comprising:
- activating a first portion of a dynamic random access memory (DRAM);
- reading a first portion of data from a first portion of a static random access memory (SRAM) in response to receiving a DRAM command at the SRAM;
- latching the first portion of data from the first portion of the SRAM in a first sense amplifier of one or more sense amplifiers;
- and
- writing the first portion of data from the one or more sense amplifiers to the first portion of the DRAM.
2 more elements
An apparatus, comprising:
- a dynamic random access memory (DRAM) including one or more sense amplifiers;
- and
- a static random access memory (SRAM) coupled to the DRAM, wherein the SRAM comprises two ports, and wherein the apparatus is configured to:
- activate a DRAM row;
- read data from a column of the DRAM row;
- latch the data from the DRAM row in a first sense amplifier of the one or more sense amplifiers;
- and
- write the data from the first sense amplifier of the one or more sense amplifiers to a SRAM row.
5 more elements
An apparatus, comprising:
- a dynamic random access memory (DRAM) including one or more sense amplifiers;
- and
- a static random access memory (SRAM) coupled to the one or more sense amplifiers of the DRAM via a data bus, wherein the apparatus is configured to:
- activate a DRAM row;
- read data from a SRAM row in response to receiving a DRAM command;
- latch the data from the SRAM row in a first sense amplifier of the one or more sense amplifiers;
- and
- write the data from the first sense amplifier of the one or more sense amplifiers to a column of the DRAM row.
5 more elements
Dependencies are inferred from the claim text.