Sense amplifier and operating method for non-volatile memory with reduced need on adjusting offset to compensate the mismatch

A sense amplifier, comprising:

• a voltage comparator, coupled to a bit line and a reference bit line, and configured to compare a first input voltage and a second input voltage to output a sensing signal;
• and
• a clamping circuit, coupled between the voltage comparator, the bit line and the reference bit line,
• wherein one of the voltage comparator and the clamping circuit is with offset compensation,
• wherein the voltage comparator is further configured to trim a first voltage corresponding to the bit line and a second voltage corresponding to the reference bit line to match the voltage corresponding to the reference bit line with the voltage corresponding to the bit line.

An operating method for a non-volatile memory, the non-volatile memory comprises a memory array and a sense amplifier, wherein the sense amplifier comprises a voltage comparator with offset compensation, a first clamping circuit, and a second clamping circuit, the first clamping circuit is coupled between a first I/O node of the sense amplifier and a bit line, and the second clamping circuit is coupled between a second I/O node of the sense amplifier and a reference bit line,

• wherein the operating method comprising:
• comparing, by the voltage comparator, a first input voltage and a second input voltage via the first I/O node and the second I/O node of the sense amplifier respectively to output a sensing signal;
• and
• trimming, by the first clamping circuit and the second clamping circuit, a voltage corresponding to the bit line and a voltage corresponding to the reference bit line respectively to match the voltage corresponding to the reference bit line with the voltage corresponding to the bit line.

An operating method for a non-volatile memory, the non-volatile memory comprises a memory array and a sense amplifier, wherein the sense amplifier comprises a voltage comparator and a clamping circuit, the clamping circuit is coupled with a first I/O node of the sense amplifier, a bit line, a second I/O node of the sense amplifier, and a reference bit line, and one of the voltage comparator and the clamping circuit is with offset compensation,

• wherein the operating method comprising:
• comparing, by the voltage comparator, a first input voltage and a second input voltage via the first I/O node and the second I/O node of the sense amplifier respectively to output a sensing signal;
• and
• trimming, by the voltage comparator, a voltage corresponding to the bit line and a voltage corresponding to the reference bit line respectively to match the voltage corresponding to the reference bit line with the voltage corresponding to the bit line.