Shift register and driving method effectively avoiding threshold value drift of thin film transistor and better noise reduction

A method of driving a shift register,

• the shift register comprising:
• an input circuit coupled to an input signal terminal and a pull-up node, and configured to provide a signal of the input signal terminal to the pull-up node;
• a pull-up circuit coupled to a clock signal terminal, an output signal terminal, and the pull-up node, and configured to provide a signal of the clock signal terminal to the output signal terminal under control of the pull-up node;
• a reset circuit coupled to a reset signal terminal, the pull-up node, the output signal terminal, and a low voltage signal terminal, and configured to provide a signal of the low voltage signal terminal to the output signal terminal and the pull-up node under control of a signal of the reset signal terminal, the signal of the low voltage signal terminal having a constant first level;
• at least one noise reduction circuit coupled to a modulation voltage signal terminal, the low voltage signal terminal, the output signal terminal, the pull-up node, and at least one pull-down node, and configured to control the at least one pull-down node according to a signal of the modulation voltage signal terminal and a signal of the pull-up node, and provide the signal of the low voltage signal terminal to the output signal terminal and the pull-up node under control of the at least one pull-down node;
• and
• at least one pull-down node control circuit coupled to the at least one pull-down node, the low voltage signal terminal, and the reset signal terminal, and configured to control a voltage level of the at least one pull-down node according to the signal of the reset signal terminal,
• wherein the at least one pull-down node comprises a first pull-down node,
• the at least one pull-down node control circuit comprises a first pull-down node control circuit coupled to the first pull-down node, the low voltage signal terminal, and the reset signal terminal, and configured to control a voltage level of the first pull-down node according to the signal of the reset signal terminal, and
• the at least one noise reduction circuit comprises a first noise reduction circuit, the first noise reduction circuit comprising:
• a first modulation sub-circuit coupled to a first modulation voltage signal terminal and the first pull-down node, and configured to provide a signal of the first modulation voltage signal terminal to the first pull-down node;
• a first suppression sub-circuit coupled to the pull-up node, the first pull-down node, and the low voltage signal terminal, and configured to provide the signal of the low voltage signal terminal to the first pull-down node under control of the pull-up node;
• and
• a first noise reduction sub-circuit coupled to the first pull-down node, the pull-up node, the low voltage signal terminal, and the output signal terminal and configured to provide the signal of the low voltage signal terminal to the output signal terminal and the pull-up node under control of the first pull-down node,
• the method comprising:
• in a pull-up phase, providing an on level through the input signal terminal, and pulling up the pull-up node through the input circuit;
• in an output phase, providing the on level through the clock signal terminal, and outputting a shift signal with the on level through the output signal terminal;
• in a noise reduction initial phase, providing the on level through the reset signal terminal, resetting the pull-up node and the output signal terminal through the at least one noise reduction circuit, and controlling, by the at least one pull-down node control circuit, the at least one pull-down node to be at a second level higher than or equal to the on level;
• and
• in a noise reduction maintaining phase, controlling, by the at least one pull-down node control circuit, the at least one pull-down node to be at a third level, the third level being between the first level and the on level.