Display panel and display device

A display panel, comprising a substrate, and a pixel circuit structure, a light emitting element, a gate line, a data line, a first power line, a second power line, a light emitting control signal line, an initialization signal line and a reset control signal line on the substrate, the pixel circuit structure comprising a storage capacitor, a driving transistor, a data writing transistor, a compensation transistor, a first light emitting control transistor, a second light emitting control transistor, a first reset transistor and a second reset transistor, wherein

• a first electrode of the storage capacitor is electrically connected to the first power line, and a second electrode of the storage capacitor is electrically connected to a second electrode of the compensation transistor through a first connecting electrode;
• a gate electrode of the data writing transistor is electrically connected to the gate line, a first electrode and a second electrode of the data writing transistor are electrically connected to the data line and a first electrode of the driving transistor, respectively;
• a gate electrode of the compensation transistor is electrically connected to the gate line, and a first electrode and the second electrode of the compensation transistor are electrically connected to a second electrode and a gate electrode of the driving transistor, respectively;
• a gate electrode of the first light emitting control transistor is electrically connected to the light emitting control signal line, a first electrode and a second electrode of the first light emitting control transistor are electrically connected to the first power line and the first electrode of the driving transistor, respectively;
• a gate electrode of the second light emitting control transistor is electrically connected to the light emitting control signal line, a first electrode and a second electrode of the second light emitting control transistor are electrically connected to the second electrode of the driving transistor and the first electrode of the light emitting element, respectively;
• a gate electrode of the first reset transistor is electrically connected to the reset control signal line, a first electrode and a second electrode of the first reset transistor are electrically connected to the initialization signal line and the gate electrode of the driving transistor, respectively;
• a gate electrode of the second reset transistor is electrically connected to the reset control signal line, a first electrode and a second electrode of the second reset transistor are electrically connected to the initialization signal line and the first electrode of the light emitting element, respectively;
• a second electrode of the light emitting element is electrically connected to the second power line;
• the pixel circuit structure further comprises a first stabilization capacitor located between the data line and the first power line, the first stabilization capacitor comprises a first capacitor electrode, and the first power line is configured to provide a constant voltage signal for the pixel circuit structure;
• and
• a capacitance value of the first stabilization capacitor is equal to or greater than 10 times of a capacitance value of a parasitic capacitance between the data line and a gate electrode of the driving transistor.