Addressing for emissive displays

A system for addressing an emissive display having a plurality of pixels arranged into rows and columns, the system comprising:

• a first row of pixels including a plurality of drivers, each driver having a corresponding light emitting semiconductor, the first row being communicatively coupled to receive a first clock signal at an address select input and to receive data signals at data signal inputs, each of the received data signals corresponding to a column of the display, the first row being further communicatively coupled to output, when the first clock signal is active at the address select input, the data signals to corresponding ones of the plurality of drivers and to output the data signals via corresponding data signal outputs of the first row;
• a first row of shift registers communicatively coupled to receive the data signals from the data signal outputs of the first row and to receive a second clock signal, the first row of shift registers being further communicatively coupled to output the data signals when the second clock is active;
• and
• a second row of pixels including a plurality of drivers, each driver having a corresponding light emitting semiconductor, the second row being communicatively coupled to receive the data signals output from the first row of shift registers at corresponding ones of the plurality of drivers of light emitting semiconductors of the second row of the display.

An addressing system for an emissive display having a plurality of pixels arranged into rows and columns, the system comprising, for each of the columns:

• a first thin film transistor (TFT) communicatively coupled to receive a first clock signal at an address select input at a gate of the first TFT and a data signal input at a drain of the first TFT, wherein when the first clock signal is active at the gate of the first TFT, the data signal is passed from the drain of the first TFT to the source of the first TFT;
• a second TFT communicatively coupled to receive the data signal from the source of the first TFT at a gate of the second TFT, the second TFT driving a first light emitting semiconductor, in a first row of the display, connected to a drain of the second TFT;
• a first shift register comprising at least a third TFT, the first shift register being communicatively coupled to receive the data signal from the source of the first TFT, the first shift register receiving a second clock signal, wherein when the second clock signal is active, the data signal is output by the first shift register;
• and
• a fourth TFT communicatively coupled to receive the data signal output by the first shift register at a gate of the fourth TFT, the fourth TFT driving a second light emitting semiconductor, in a second row of the display, connected to a drain of the fourth TFT.

A method for addressing an emissive display having a plurality of pixels arranged into rows and columns, the method comprising, for each of the columns:

• receiving a first clock signal at an address select input at a gate of a first thin film transistor (TFT) and a data signal input at a drain of the first TFT, wherein when the first clock signal is active at the gate of the first TFT, the data signal is passed from the drain of the first TFT to the source of the first TFT;
• receiving the data signal from the source of the first TFT at a gate of a second TFT, the second TFT driving a first light emitting semiconductor, in a first row of the display, connected to a drain of the second TFT;
• receiving the data signal from the source of the first TFT at a first shift register comprising at least a third TFT, the first shift register receiving a second clock signal, wherein when the second clock signal is active, the data signal is output by the first shift register;
• and
• receiving the data signal output by the first shift register at a gate of a fourth TFT, the fourth TFT driving a second light emitting semiconductor, in a second row of the display, connected to a drain of the fourth TFT.