Analog vector-matrix multiplication circuit

An analog vector-matrix multiplication operation circuit, characterized by comprising:

• a plurality of analog voltage input ends, a programmable semiconductor device array, a plurality of first ends and a plurality of second ends;
• in the programmable semiconductor device array, gates of all programmable semiconductor devices in each row are connected to the same analog voltage input end, a plurality of rows of the programmable semiconductor devices are correspondingly connected to the plurality of analog voltage input ends, for respectively inputting a column of analog voltage signals V1˜VM at the same time, wherein the gates of all programmable semiconductor devices in each row get one of the analog voltage signals, drains of all programmable semiconductor devices in each column are connected to a same first end, a plurality of columns of programmable semiconductor devices are correspondingly connected to the plurality of first ends, sources of all programmable semiconductor devices in each column are connected to a same second end, the plurality of columns of programmable semiconductor devices are correspondingly connected to the plurality of second ends, and a threshold voltage of each programmable semiconductor device can be adjusted by dynamically adjusting the threshold voltage of each programmable semiconductor device in advance, a variable equivalent analog weight is stored in each programmable semiconductor device, so as to store an analog data array in the programmable semiconductor device array;
• wherein, the same first end is a bias voltage input end, and the same second end is an analog current output end;
• or
• the same first end is an analog current output end, and the same second end is a bias voltage input end;
• a current detection output circuit connected to the analog current output end and used to process and output an analog current output signal output by the analog current output end.