Memory tiering using PCIe connected far memory

A method of operation of a memory sub-system comprising:

• monitoring, by a memory-mapped storage device operatively coupled with a host system via a peripheral component interconnect express (PCIe) bus, a data temperature of a plurality of memory pages stored in a host-addressable region of the memory-mapped storage device;
• determining that a value representing a data temperature of a first memory page of the plurality of memory pages is greater than or equal to a first threshold value associated with the first memory page;
• sending an indication of the first memory page having the value representing the data temperature being greater than or equal to the first threshold value to a migration agent executing on the host system;
• receiving a first migration command from the migration agent executing on the host system via the PCIe bus, the first migration command indicating the first memory page;
• and
• responsive to receiving the first migration command, initiating a first direct memory access (DMA) transfer, via a channel separate from the PCIe bus and using a DMA engine disposed on the memory-mapped storage device, of the first memory page from the memory-mapped storage device to a cache memory device operatively coupled with the host system.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

• monitor a data temperature of a plurality of memory pages stored in a host-addressable region of a cache memory component;
• determine that a value representing a data temperature of a first memory page of the plurality of memory pages is less than or equal to a first threshold value associated with the first memory page;
• and
• responsive to the value representing the data temperature of the first memory page of the plurality of memory pages being less than or equal to the first threshold value associated with the first memory page, send a first migration command indicating the first memory page to a direct memory access (DMA) engine disposed on a memory-mapped storage component via a peripheral component interconnect express (PCIe) bus, the first migration command to cause the DMA engine to initiate a first DMA transfer of the first memory page from the cache memory component to a host-addressable region of the memory-mapped storage component via a channel separate from the PCIe bus.