Controller, memory system, and operating methods thereof

An operating method of a memory system which includes at least one nonvolatile memory device and a controller configured to control the at least one nonvolatile memory device, the method comprising:

• detecting, by the controller, at least one bad block in at least one super block including a plurality of way-interleaving-capable memory blocks;
• generating, by the controller, a modified super block by replacing the at least one bad block with a spare block;
• setting each of memory cells in way-interleaving-capable memory blocks except the spare block in the modified super block to operate in a first mode to store N-bit data, and setting each of memory cells in the spare block in the modified super block to operate in a second mode to store M-bit data when the spare block is a non-way-interleaving-capable spare block;
• and
• setting each of memory cells in the spare block and the way-interleaving-capable memory blocks in the modified super block to operate in the first mode when the spare block is a way-interleaving-capable spare block,
• wherein N is a natural number of 2 or more and M is a natural number less than N.

A memory system comprising:

• a nonvolatile memory device including a non-way-interleaving-capable spare block, a way-interleaving-capable spare block, and a super block having plural way-interleaving-capable memory blocks;
• and
• a controller configured to:
• modify the super block by replacing a bad block therein with a spare block to generate a modified super block;
• and
• control the nonvolatile storage device to perform an operation on the modified super block,
• wherein each memory cell within the way-interleaving-capable memory block in the modified super block is capable of storing N-bit data and each cell within the spare block in the modified super block is capable of storing M-bit data when the spare block is the non-way-interleaving-capable spare block, where N and M are each natural numbers and M is less than N;
• wherein each memory cell within the way-interleaving-capable memory block and the spare block in the modified super block is capable of storing N-bit data when the spare block is the way-interleaving-capable spare block;
• and
• wherein a number of memory cells within the non-way-interleaving-capable spare block is N/M times greater than a number of memory cells within one of the plural way-interleaving-capable memory blocks.