Storage device and method for operating storage device
AssigneeSamsung Electronics Co., Ltd.
InventorsJong Won Lee, Kil Hwan Kim
Life of this patent
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Abstract
A storage device and a method for operating the storage device are provided. A storage device includes processing circuitry configured to write multi-stream data on a non-volatile memory; generate parity data of the multi-stream data and/or intermediate parity data upon which the parity data is based; store the parity data and/or the intermediate parity data in a first memory; and perform a data swap between the first memory and a second memory, wherein a number of slots of a plurality of slots in the first memory is based on a number of execution units of program buffering of the non-volatile memory.
Claims16
A storage device comprising:
- processing circuitry configured to,
- write multi-stream data on a non-volatile memory;
- generate parity data of the multi-stream data and/or intermediate parity data upon which the parity data is based;
- store the parity data and/or the intermediate parity data in a first memory;
- and
- perform a data swap between the first memory and a second memory in response to a plurality of slots in the first memory having no empty slot,
- wherein a number of slots of a plurality of slots in the first memory is determined according to a number of execution units of program buffering of the non-volatile memory,
- wherein the number of slots of the first memory is proportional to a number of execution units of the program buffering of the non-volatile memory, and
- wherein the number of execution units of the program buffering is based on a number of channels and ways of the non-volatile memory.
A storage device comprising:
- a non-volatile memory;
- a controller configured to write multi-stream data on the non-volatile
- memory;
- a processor configured to generate parity data of the multi-stream data and/or intermediate parity data upon which the parity data is based;
- a first memory configured to store the parity data and/or the intermediate parity data;
- and
- a second memory configured to perform data swap with the first memory,
- wherein the processor is configured to determine whether to perform the data swap based on
- a number of the parity data and/or the intermediate parity data stored in the first memory, and
- a value determined according to a number of execution units of a program buffering of the non-volatile memory,
- wherein the value is proportional to the number of execution units of the program buffering of the non-volatile memory, and
- wherein the number of execution units of the program buffering is based on a number of channels and ways of the non-volatile memory.
Dependencies are inferred from the claim text.