Semiconductor device performing a multiplication and accumulation operation

A semiconductor device comprising:

• a cell array including a plurality of unit cells, the plurality of unit cells configured to store a plurality of analog voltage values corresponding to a plurality of first signals by a write operation and to output a plurality of output signals corresponding to the analog voltage values by a read operation;
• a computation circuit including a plurality of unit computation circuits, the plurality of unit computation circuits receiving the plurality of output signals and a plurality of second signals and the plurality of unit computation circuits being set to have respective capacitances according to the plurality of second signals during a computation operation;
• and
• a control circuit configured to control the cell array and the computation circuit during the write operation, the read operation, and the computation operation,
• wherein each of the plurality of unit cells includes:
• a cell capacitor having a first terminal which is grounded;
• a write circuit connected to a second terminal of the cell capacitor, and configured to charge the cell capacitor with a cell voltage corresponding to a value of one of the plurality of first signals during the write operation;
• and
• a read circuit connected to the second terminal of the cell capacitor, and configured to provide an output voltage corresponding to the cell voltage during the read operation, and
• wherein the read circuit includes a first read transistor having a gate receiving the cell voltage and a drain receiving a bias current, and a second read transistor having a gate receiving a row read signal, a drain coupled with a source of the first read transistor, and a source outputting the output voltage.