Epoch-based determination of completion of barrier termination command

A method comprising:

• issuing memory access transactions, each memory access transaction specifying an epoch identifier indicative of a current epoch in which the memory access transaction is issued;
• tracking, for each of at least two epochs, a number of outstanding memory access transactions issued in that epoch;
• changing the current epoch to a next epoch, in response to a barrier point signal representing a barrier point;
• and
• signalling completion of a barrier termination command when the tracking indicates that there are no outstanding memory access transactions remaining which were issued in one or more epochs preceding the barrier point,
• in which in response to the barrier point signal, the method comprises preventing the current epoch being changed to the next epoch, when there is still at least one outstanding memory access transaction associated with the next epoch, or the next epoch is one of said one or more epochs for an earlier barrier termination command which has not yet been signalled as completed.

An apparatus comprising:

• transaction handling circuitry to issue memory access transactions, each memory access transaction specifying an epoch identifier indicative of a current epoch in which the memory access transaction is issued;
• transaction tracking circuitry to track, for each of at least two epochs, a number of outstanding memory access transactions issued in that epoch;
• barrier termination circuitry to signal completion of a barrier termination command when the transaction tracking circuitry indicates that there are no outstanding memory access transactions remaining which were issued in one or more epochs preceding a barrier point;
• and
• epoch changing circuitry to change the current epoch to a next epoch, in response to a barrier point signal representing said barrier point, wherein:
• the transaction tracking circuitry comprises at least two transaction counters, each transaction counter to count the number of outstanding memory access transactions issued in a corresponding epoch;
• the transaction tracking circuitry is configured to increment a transaction counter corresponding to the current epoch, in response to a memory access transaction to be issued by the transaction handling circuitry;
• in response to issuing a memory access transaction specifying a given epoch identifier, the transaction handling circuitry is configured to receive a transaction response specifying the given epoch identifier;
• and
• in response to receipt of the transaction response, the transaction tracking circuitry is configured to decrement a transaction counter corresponding to the epoch indicated by the given epoch identifier specified by the transaction response.