US 11,375,980 B2Granted

Ultrasound apparatuses and methods for fabricating ultrasound devices

AssigneeBfly Operations, Inc.

InventorsKailiang Chen, Nevada J. Sanchez, Susan A. Alie, Tyler S. Ralston, Jonathan M. Rothberg, Keith G. Fife, Joseph Lutsky

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Abstract

Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application-specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.

Claims14

Dependent claims

An ultrasound device, comprising:

a plurality of capacitive micromachined ultrasonic transducers (CMUT);
a first application-specific integrated circuit (ASIC) comprising a pulser configured to provide a signal to a CMUT of the plurality of CMUTs, integrated analog processing receive circuitry configured to process a signal produced by the CMUT in response to receiving an acoustic signal, an analog-to-digital converter (ADC) configured to digitize a signal provided by the analog processing receive circuitry, and serial-deserialized (SERDES) transmit circuitry, wherein the first ASIC is configured to operate at a first operating voltage in a range of approximately 30-80 Volts;
a second ASIC comprising SERDES receive circuitry and integrated digital processing circuitry configured to digitally process a signal provided by the SERDES receive circuitry, wherein the integrated digital processing circuitry is configured to operate at a second operating voltage in a range of approximately 0.45-0.9 Volts;
and
a SERDES communication link coupling the SERDES transmit circuitry of the first ASIC and the SERDES receive circuitry of the second ASIC.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/404,672Filed 6 May 2019 · continuation
Priority: 15 Nov 2017
Published: US 2019/0142387 A129 Aug 2019
Granted: 5 Jul 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

A61B 8/5207
Devices using data or image processing specially adapted for diagnosis using ultrasonic, sonic or infrasonic waves: involving processing of raw…
A61B 8/4483
Constructional features of the ultrasonic, sonic or infrasonic diagnostic device: characterised by features of the ultrasound transducer
A61B 8/54
Diagnosis using ultrasonic, sonic or infrasonic waves: control of the diagnostic device
G01S 7/52017
Of systems according to group G01S15/00: particularly adapted to short-range imaging

Family

Application62/586,716Us provisional application · filed 15 Nov 2017
Application62/687,189Us provisional application · filed 19 Jun 2018
Application16/192,603Parent of this continuation · filed 15 Nov 2018
US 2019/0261955 A1Pre-grant publication · published 29 Aug 2019
US 2019/0142387 A1Published application
US 11,375,980 B2This patent

From the US filing history. Foreign family members aren’t listed.