Method and apparatus for generating redundant bits for error detection
AssigneeNEC Corporation
InventorsNorifumi Kamiya, Prakash Chaki
Life of this patent
Estimating the term…
Abstract
A redundant bit generating device that generates redundant bits for error detection, that are added to a block of information bits, includes: a redundant bit calculation function that generates a predetermined number of redundant bits from the information bits according to a CRC polynomial; and a bit interleaving function that dispersedly arranges the predetermined number of redundant bits within the information bits using a permutation pattern determined based on the CRC polynomial.
Claims24
An encoding device comprising:
- an encoder configured to input an information bit string and generate an output data string including redundant bits for error detection, that are added to the information bit string by:
- generating a predetermined number of redundant bits from the information bit string according to a cyclic redundancy check (CRC) polynomial;
- and
- dispersedly arranging the predetermined number of redundant bits within the information bit string using a permutation pattern determined based on the CRC polynomial, to generate the output data string;
- a mapping unit configured to assign the output data string to locations of information bits of a Polar code to generate mapped data;
- and
- a Polar encoder that polar-encodes the mapped data;
- and
- transmitting the polar-encoded mapped data in a digital data communications system.
A device for generating redundant bits for error detection, that are added to a block of information bits, comprising:
- a number of on-off switches that input the information bits, wherein the number is identical to a count of redundant bits calculated from a cyclic redundancy check (CRC) polynomial;
- cumulative adders configured to calculate the redundant bits by individually accumulating outputs of the number of on-off switches;
- a selector that selects one of an input information bit and the redundant bits calculated respectively by the cumulative adders, to generate a data string including the information bits and the redundant bits added thereto;
- and
- a controller configure to control the on-off switches and the selector using a permutation pattern determined based on the CRC polynomial.
An encoding method of an encoding device comprising:
- by an encoder, inputting an information bit string;
- generating a predetermined number of redundant bits from the information bit string according to a cyclic redundancy check (CRC) polynomial;
- and
- dispersedly arranging the predetermined number of redundant bits within the information bit string using a permutation pattern determined based on the CRC polynomial, to generate the output data string including redundant bits for error detection, that are added to the information bit string;
- by a mapping unit, assigning the output data string to locations of information bits of a Polar code to generate mapped data;
- by a Polar encoder, polar-encoding the mapped data;
- and
- transmitting the polar-encoded mapped data in a digital data communications system.
A method for generating redundant bits for error detection, that are added to a block of information bits, comprising:
- by a number of on-off switches, inputting the information bits and passing or blocking an information bit according to a first control signal, wherein the number is identical to a count of redundant bits calculated from a cyclic redundancy check (CRC) polynomial;
- by cumulative adders, calculating the redundant bits by individually accumulating outputs of the number of on-off switches;
- by a selector, selecting one of an input information bit and the redundant bits calculated respectively by the cumulative adders, to generate a data string including the information bits and the redundant bits added thereto, according to a second control signal;
- and
- by a controller, outputting the first control signal and the second control signal for controlling the on-off switches and the selector using a permutation pattern determined based on the CRC polynomial.
A device for detecting errors using redundant bits enabling error detection, that are added to a block of information bits, comprising:
- a number of on-off switches that input the information bits, wherein the number is identical to a count of redundant bits calculated from a cyclic redundancy check (CRC) polynomial;
- cumulative adders that calculate the redundant bits by individually accumulating outputs of the number of on-off switches;
- a selector that selects one of an input information bit and the redundant bits calculated respectively by the cumulative adders, to generate a data string including the information bits and the redundant bits added thereto;
- a controller that controls the on-off switch means and the selection means using a permutation pattern determined based on the CRC polynomial;
- and
- a decision unit configured to decide whether an error exists or not, by comparing a redundant bit of the received data to a redundant bit calculated.
A non-transitory recording medium storing a program for controlling a processor to function as an encoding device, the program comprising instructions that when executed by the processor:
- input an information bit string;
- generate a predetermined number of redundant bits from the information bit string according to a cyclic redundancy check (CRC) polynomial;
- and
- dispersedly arrange the predetermined number of redundant bits within the information bit string using a permutation pattern determined based on the CRC polynomial, to generate the output data string including redundant bits for error detection, that are added to the information bit string;
- assign the output data string to locations of information bits of a Polar code to generate mapped data;
- polar-encode the mapped data;
- and
- transmitting the polar-encoded mapped data in a digital data communications system.
A non-transitory recording medium storing a program for functioning a computer as a device for generating redundant bits for error detection, that are added to a block of information bits, the program comprising:
- by a number of on-off switches, inputting the information bits, wherein the number is identical to a count of redundant bits calculated from a cyclic redundancy check (CRC) polynomial;
- by cumulative adders, calculating the redundant bits by individually accumulating outputs of the number of on-off switches;
- by a selector, selecting one of an input information bit and the redundant bits calculated respectively by the cumulative adders, to generate a data string including the information bits and the redundant bits added thereto;
- and
- by a controller, controlling the on-off switches and the selector using a permutation pattern determined based on the CRC polynomial.
A non-transitory recording medium storing a program for detecting errors using redundant bits enabling error detection, that are added to a block of information bits, the program comprising:
- by a number of on-off switches, inputting the information bits, wherein the number is identical to a count of redundant bits calculated from a cyclic redundancy check (CRC) polynomial;
- by cumulative adders, calculating the redundant bits by individually accumulating outputs of the number of on-off switches;
- by a selector, selecting one of an input information bit and the redundant bits calculated respectively by the cumulative adders, to generate a data string including the information bits and the redundant bits added thereto;
- by a controller, controlling the on-off switches and the selector using a permutation pattern determined based on the CRC polynomial;
- and
- by a decision unit, deciding on whether an error exists or not, by comparing a redundant bit of the received data to a redundant bit calculated.
Dependencies are inferred from the claim text.