Wideband buffer with DC level shift and bandwidth extension for wired data communication

A wideband communication circuit comprising:

• a wideband buffer with first and second input terminals to receive input signals and first and second output terminals to transmit output signals;
• and
• a continuous-time linear equalizer (CTLE) connected to the first and second output terminals of the wideband buffer to equalize the output signals from the wideband buffer,
• wherein the wideband buffer comprises:
• first and second transistors deployed as a voltage buffer and connected to the first and second input terminals;
• first and second parallel resistor-capacitor pairs connected to the first and second transistors;
• first and second cross-coupled transistors connected to the first and second parallel resistor-capacitor pairs and connected to the first and second output terminals;
• and
• first and second current sources connected to the first and second cross-coupled transistors and a fixed voltage,
• wherein the first transistor, the first parallel resistor-capacitor pair, the first cross-coupled transistor and the first current source are connected in series and wherein the second transistor, the second parallel resistor-capacitor pair, the second cross-coupled transistor and the second current source are connected in series.

A wideband buffer circuit comprising:

• first and second transistors deployed as a voltage buffer and connected to first and second input terminals;
• first and second parallel resistor-capacitor pairs connected to the first and second transistors, wherein resistors of the first and second parallel resistor-capacitor pairs provide signal paths for low frequency signals and wherein capacitors of the first and second parallel resistor-capacitor pairs provide signal paths for high frequency signals;
• first and second cross-coupled transistors connected to the first and second parallel resistor-capacitor pairs and connected to first and second output terminals;
• another capacitor connected to the first and second cross-coupled transistors and the first current source, wherein the another capacitor and the first and second cross-coupled transistors provide negative capacitance for bandwidth expansion;
• and
• first and second current sources connected to the first and second cross-coupled transistors and a fixed voltage,
• wherein the first transistor, the first parallel resistor-capacitor pair, the first cross-coupled transistor and the first current source are connected in series and wherein the second transistor, the second parallel resistor-capacitor pair, the second cross-coupled transistor and the second current source are connected in series.