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US 11,349,443 B2Granted
Operational amplifier using single-stage amplifier with slew-rate enhancement and associated method
AssigneeMediatek Inc.
InventorsYu-Hung Lin, Kuan-Ta Chen
Life of this patent
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Abstract
An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.
Claims12
An operational amplifier comprising:
- a single-stage amplifier, arranged to receive an input signal and amplify the input signal to generate an output signal, wherein the single-stage amplifier comprises a voltage controlled current source circuit that operates in response to a bias voltage input;
- and
- a current controller, coupled to the voltage controlled current source circuit, wherein the current controller is arranged to receive the input signal, and generate the bias voltage input according to the input signal;
- wherein the bias voltage input comprises a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage;
- and the voltage controlled current source circuit comprises:
- a first P-channel metal-oxide semiconductor (PMOS) transistor, having a gate node arranged to receive the first bias voltage;
- a second PMOS transistor, having a gate node arranged to receive the second bias voltage;
- a first N-channel metal-oxide semiconductor (NMOS) transistor, having a gate node arranged to receive the third bias voltage;
- and
- a second NMOS transistor, having a gate node arranged to receive the fourth bias voltage;
- wherein the input signal of the single-stage amplifier is not fed into any of the gate node of the first PMOS transistor, the gate node of the second PMOS transistor, the gate node of the first NMOS transistor, and the gate node of the second NMOS transistor.
8 more elements
A signal amplification method comprising:
- generating a bias voltage input according to an input signal;
- and
- amplifying, by a single-stage amplifier, the input signal to generate an output signal, wherein the single-stage amplifier comprises a voltage controlled current source circuit that operates in response to the bias voltage input;
- wherein the bias voltage input comprises a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage;
- and the voltage controlled current source circuit comprises:
- a first P-channel metal-oxide semiconductor (PMOS) transistor, having a gate node arranged to receive the first bias voltage;
- a second PMOS transistor, having a gate node arranged to receive the second bias voltage;
- a first N-channel metal-oxide semiconductor (NMOS) transistor, having a gate node arranged to receive the third bias voltage;
- and
- a second NMOS transistor, having a gate node arranged to receive the fourth bias voltage;
- wherein the input signal of the single-stage amplifier is not fed into any of the gate node of the first PMOS transistor, the gate node of the second PMOS transistor, the gate node of the first NMOS transistor, and the gate node of the second NMOS transistor.
8 more elements
Dependencies are inferred from the claim text.