Defensive routing and related techniques

An integrated circuit (IC) structure, comprising:

• a layer including a security-critical wire;
• and
• at least one synthetic guard wire shielding at least one surface of the security-critical wire, wherein the at least one synthetic guard wire is not inherent to a host IC design of the IC structure;
• and wherein the least one synthetic guard wire is in a same layer as the security-critical wire;
• and wherein the least one synthetic guard wire is connected to at least one internal sensor for on-chip tamper analysis.

A method for forming an integrated circuit (IC) structure, the method comprising:

• identifying at least one security-critical net in an IC design, the at least one security-critical net including a security-critical wire;
• identifying at least one unblocked surface of the security-critical wire;
• guarding the identified at least one surface of the identified security-critical wire with a synthetic guard wire;
• and
• routing the synthetic guard wire to at least one internal sensor for on-chip tamper analysis.

A method for forming an integrated circuit (IC) structure, the method comprising:

• identifying at least one security-critical wire in an IC design;
• identifying at least one unblocked surface of the identified at least one security-critical wire;
• guarding the identified at least one surface of the identified at least one security-critical wire with a synthetic guard wire;
• and
• routing the synthetic guard wire to at least one internal sensor for on-chip tamper analysis.