# US 11,310,921 B2 · Buried via in a circuit board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,310,921 B2 - Document ID: US11310921B2 - Status: Granted - Kind: B2 - Application number: 16/660,861 - Filed: 2019-10-23 - Published: 2021-04-29 - Granted: 2022-04-19 - Earliest claimed: 2019-10-23 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Kyle Indukummar Giesen; Matteo Cocchini; Sylvain Pharand - Web page: https://patentgrep.com/patent/US11310921B2 ## CPC - H05K 3/4614: {the electrical connections between the circuit boards being made during lamination} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers} - H05K 3/4632: {laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets} - H05K 2203/0415: Small preforms other than balls, e.g. discs, cylinders or pillars - H05K 2203/063: of preperforated insulating layer - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A method may include forming a plurality of multilayer cores wherein each multilayer core comprises a sheet of cured dielectric material having a layer of metal on each side of the sheet of cured dielectric material, patterning each layer of metal in the plurality of multilayer cores to form wiring traces in each layer of metal, embedding a solder element in at least one sheet of a plurality of sheets of uncured dielectric material, wherein the solder element having a melting point temperature within a temperature range of a curing temperature of the uncured dielectric material, forming a printed circuit board by alternately stacking the plurality of multilayer cores with the plurality of sheets of uncured dielectric material between each multilayer core, laminating the stack of multilayer cores and sheets of uncured dielectric material to cause curing of the sheets of uncured dielectric material and melting of the solder element. ## Claims ### Claim 1 A method comprising: forming a plurality of multilayer cores, each of the plurality of multilayer cores comprising a sheet of cured dielectric material sandwiched between two metal wiring layers; embedding a solder element in an uncured dielectric layer, wherein a melting temperature of the solder element matches a curing temperature of the uncured dielectric layer; stacking the uncured dielectric layer between two of the plurality of multilayer cores, wherein the embedded solder element is aligned with wire traces of the metal wiring layers of each of the two of the plurality of multilayer cores; and simultaneously melting the solder element and curing the uncured dielectric layer by laminating the stacked uncured dielectric layer between the two of the plurality of multilayer cores with a single lamination process, wherein melting the solder element and curing the uncured dielectric layer forms an electrical connection between the two multilayer cores and forms a physical connection between the two of the plurality of multilayer cores and the cured dielectric layer. ### Claim 2 (depends on 1) The method of claim 1, wherein the simultaneously melting the solder element and curing the uncured dielectric layer by laminating the stacked uncured dielectric layer between the two of the plurality of multilayer cores with a single lamination process is performed without using a laser heating step. ### Claim 3 (depends on 1) The method of claim 1, further comprising: forming a through via opening through the stack of two of the multilayer cores and the cured dielectric layer; and metallizing the through via opening. ### Claim 4 (depends on 1) The method of claim 1, wherein the two metal wiring layers of each of the plurality of multilayer cores are copper. ### Claim 5 (depends on 1) The method of claim 1, wherein the solder element comprises solder and a flux. ### Claim 6 A method comprising: forming a plurality of multilayer cores, each of the plurality of multilayer cores comprising a sheet of cured dielectric material sandwiched between two metal wiring layers; embedding solder elements in a plurality of uncured dielectric layers, wherein a melting temperature of each of the solder elements matches a curing temperature of each of the uncured dielectric layers; alternately stacking the plurality of multilayer cores with the plurality of uncured dielectric layers, wherein each of the embedded solder elements are aligned with respective wire traces of the metal wiring layers of each of the uncured dielectric layers; and simultaneously melting the solder elements and curing the plurality of uncured dielectric layers by laminating the stacked plurality of multilayer cores with the plurality of uncured dielectric layers with a single lamination process and without using a laser heating step, wherein melting the solder elements and curing the plurality of uncured dielectric layers forms electrical connections between adjacent multilayer cores of the stacked plurality of multilayer cores and forms physical connections between the plurality of multilayer cores and the cured dielectric layers. ### Claim 7 (depends on 6) The method of claim 6, further comprising: forming a through via opening through the stack of the plurality of multilayer cores and the cured dielectric layers; and metallizing the through via opening. ### Claim 8 (depends on 6) The method of claim 6, wherein the two metal wiring layers of each of the plurality of multilayer cores are copper. ### Claim 9 (depends on 6) The method of claim 6, wherein the solder elements each comprise solder and a flux. ### Claim 10 A method comprising: forming a plurality of multilayer cores, each of the plurality of multilayer cores comprising a sheet of cured dielectric material sandwiched between two metal wiring layers; embedding a solder element in an uncured dielectric layer; stacking the uncured dielectric layer between two of the plurality of multilayer cores, wherein the embedded solder element is aligned with wire traces of the metal wiring layers of each of the two of the plurality of multilayer cores; and simultaneously melting the solder element and curing the uncured dielectric layer by laminating the stacked uncured dielectric layer between the two of the plurality of multilayer cores with a single lamination process and without using a laser heating step, wherein melting the solder element and curing the uncured dielectric layer forms an electrical connection between the two multilayer cores and forms a physical connection between the two of the plurality of multilayer cores and the cured dielectric layer. ### Claim 11 (depends on 10) The method of claim 10, further comprising: forming a through via opening through the stack of the two of the plurality of multilayer cores and the cured dielectric layer; and metallizing the through via opening. ### Claim 12 (depends on 10) The method of claim 10, wherein the two metal wiring layers of each of the plurality of multilayer cores are copper. ### Claim 13 (depends on 10) The method of claim 10, wherein the solder element comprises solder and a flux. ### Claim 14 (depends on 10) The method of claim 10, wherein the solder element has a melting temperature within 5° C. of a curing temperature. ### Claim 15 (depends on 10) The method of claim 10, wherein the solder element has a melting temperature below a curing temperature of the uncured dielectric layer.