# US 11,310,907 B2 · Microelectronic package with substrate-integrated components > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,310,907 B2 - Document ID: US11310907B2 - Status: Granted - Kind: B2 - Application number: 16/697,699 - Filed: 2019-11-27 - Published: 2021-05-27 - Granted: 2022-04-19 - Earliest claimed: 2019-11-27 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Georgios Dogiamis; Aleksandar Aleksov; Feras Eid; Telesphor Kamgaing; Johanna M. Swan - Web page: https://patentgrep.com/patent/US11310907B2 ## CPC - H05K 1/0233: {Filters, inductors or a magnetic substance} - H05K 1/0218: {by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence)} - H05K 1/165: {incorporating printed inductors} - H05K 3/1275: {by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing} - H05K 3/4038: {Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence)} - H05K 9/0037: {Housings with compartments containing a PCB, e.g. partitioning walls} - H10W 70/685: comprising multiple insulating layers - H05K 1/025: {Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance (H05K1/024 and H05K1/0243 take precedence; for semiconductor devices H10W44/20)} - H05K 2201/09636: Details of adjacent, not connected vias - H05K 2201/09672: Superposed layout, i.e. in different planes - H05K 2201/1006: Non-printed filter - H05K 2201/10068: Non-printed resonator - H05K 2201/10098: Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 74/114: {by a substrate and the encapsulations} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Embodiments may relate to a microelectronic package or a die thereof which includes a die, logic, or subsystem coupled with a face of the substrate. An inductor may be positioned in the substrate. Electromagnetic interference (EMI) shield elements may be positioned within the substrate and surrounding the inductor. Other embodiments may be described or claimed. ## Claims ### Claim 1 A microelectronic package, comprising: a package substrate; a die coupled with a face of the package substrate; overmold material at least partially surrounding the die, wherein the overmold material comprises a conductive through-mold via (TMV) proximate to the die; a first inductor and a second inductor positioned in the package substrate and within a die shadow of the die; and electromagnetic interference (EMI) shield elements positioned within the package substrate and surrounding the first inductor and the second inductor, wherein: the package substrate comprises a first redistribution layer having a first thickness and a second redistribution layer having a second thickness, the second thickness being less than the first thickness, the first inductor is in the first redistribution layer, the second inductor is in the second redistribution layer, and the second inductor has a lower Q-factor than the first inductor. ### Claim 2 (depends on 1) The microelectronic package of claim 1, wherein at least one of the first inductor and the second inductor includes a metal element positioned in two layers of the package substrate. ### Claim 3 (depends on 1) The microelectronic package of claim 1, wherein at least one of the first inductor and the second inductor includes a conductive element in a first layer of the package substrate, a conductive element in a second layer of the package substrate, and a conductive element in a third layer of the package substrate, and wherein the conductive elements of the first layer and the second layer are electronically coupled by a trench via. ### Claim 4 (depends on 1) The microelectronic package of claim 1, wherein the EMI shield elements include a through-substrate via (TSV) within the package substrate. ### Claim 5 (depends on 1) The microelectronic package of claim 1, wherein the EMI shield elements further surround the die. ### Claim 6 (depends on 1) The microelectronic package of claim 1, wherein the die is a power amplifier (PA) or an acoustic wave resonator (AWR). ### Claim 7 (depends on 1) The microelectronic package of claim 1, wherein: the package substrate includes a plurality of layers, the plurality of layers includes a first subset of layers comprising the first redistribution layer, wherein respective layers of the first subset of layers has a first z-height, and the plurality of layers includes a second subset of layers comprising the second redistribution layer, wherein respective layers of the second subset of layers has a second z-height. ### Claim 8 (depends on 1) The microelectronic package of claim 1, wherein the microelectronic package has a height of less than 300 micrometers. ### Claim 9 (depends on 1) The microelectronic package of claim 1, wherein the inductor is a multi-loop inductor. ### Claim 10 (depends on 1) The microelectronic package of claim 1, wherein the microelectronic package is a RF front-end module (FEM). ### Claim 11 (depends on 1) The microelectronic package of claim 1, further comprising an EMI shield layer above the overmold material over at least a portion of the die. ### Claim 12 An electrical device, comprising: a processing device; and a communication chip, wherein at least one of the processing device and the communication chip includes a microelectronic package that includes: a package substrate comprising a first redistribution layer and a second redistribution layer, the second redistribution layer being thinner than the first redistribution layer, a die coupled with a face of the package substrate, overmold material at least partially surrounding the die, and comprising a conductive TMV proximate to the die, a first inductor and a second inductor positioned in the first redistribution layer and the second redistribution layer respectively of the package substrate and within a die shadow of the die, and electromagnetic interference (EMI) shield elements positioned within the package substrate and surrounding the inductor. ### Claim 13 (depends on 12) The electrical device of claim 12, wherein at least one of the first inductor and the second inductor includes a metal element positioned in two layers of the package substrate.