# US 11,309,918 B2 · Memory system

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- Number: US 11,309,918 B2
- Document ID: US11309918B2
- Status: Granted
- Kind: B2
- Application number: 17/005,282
- Filed: 2020-08-27
- Published: 2021-09-02
- Granted: 2022-04-19
- Earliest claimed: 2020-03-02
- Assignees: Kioxia Corporation
- Applicants: Kioxia Corporation
- Inventors: Yuta Kumano; Hironori Uchikawa
- Web page: https://patentgrep.com/patent/US11309918B2

## CPC

- H03M 13/1108: {Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping}
- H03M 13/1585: {Determination of error values}
- G06F 11/0787: {Storage of error reports, e.g. persistent data storage, storage using memory protection}
- H03M 13/1105: {Decoding}
- H03M 13/1148: {Structural properties of the code parity-check or generator matrix}
- H03M 13/1515: {Reed-Solomon codes}
- H03M 13/152: {Bose-Chaudhuri-Hocquenghem [BCH] codes}
- H03M 13/2909: {Product codes}
- H03M 13/2927: {Decoding strategies}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory stores a multidimensional error correction code in which each of a plurality of symbol groups is encoded by both a first component code and a second component code. The memory controller reads the error correction code from the nonvolatile memory, executes a first decoding process using the first component code and the second component code, and when the first decoding process fails, executes a second decoding process on an error symbol group. The second decoding process includes a process of selecting the positions of a plurality of symbols whose values included in the error symbol group are to be inverted according to a decision rule. The decision rule includes a rule for cyclically shifting a position selected for the second decoding process at to decide the position for the second decoding process at the next time.

## Claims

### Claim 1

A memory system, comprising:
a nonvolatile memory configured to store a multidimensional error correction code in which each of a plurality of symbol groups, each of which is a set of a plurality of symbols forming a code, is encoded by both a first component code and a second component code; and
a memory controller configured to:
read data encoded by the multidimensional error correction code from the nonvolatile memory and execute a first decoding process using the first component code and the second component code; and
when the first decoding process fails, execute a second decoding process on an error symbol group which includes an error according to both the first component code and the second component code, wherein
the second decoding process includes:
determining the positions of a plurality of symbols whose values are to be inverted from among the plurality of symbols included in the error symbol group according to a predetermined decision rule;
inverting the values of the plurality of symbols at the determined positions; and
performing a decoding process using at least one of the first component code and the second component code after the values are inverted, and
the decision rule includes a rule for cyclically shifting the positions decided for the second decoding process at the m-th time in the error symbol group, where m is an integer of 1 or more, to decide the positions for the second decoding process at the (m+1)th time.

### Claim 2 (depends on 1)

The memory system according to claim 1, wherein the decision rule includes:
a rule for selecting a position initial value as a position for the second decoding process at the first time; and
a rule for selecting a position for the second decoding process after the second time by a position obtained by cyclically shifting the initial value.

### Claim 3 (depends on 2)

The memory system according to claim 2, wherein the decision rule further includes a rule for selecting a new initial value once the cyclically shifted position returns to the initial value.

### Claim 4 (depends on 1)

The memory system according to claim 1, wherein the number of symbols included in the error symbol group and the shift amount of the cyclic shift are relatively prime.

### Claim 5 (depends on 1)

The memory system according to claim 1, wherein the position is represented by a binary sequence that includes the same number of bits as the number of symbols included in the error symbol group, with a bit corresponding to a symbol whose value is to be inverted being set to 1 and a bit corresponding to a symbol whose value is not to be inverted being set to 0.

### Claim 6 (depends on 1)

The memory system according to claim 1, wherein the position is represented by an index sequence including a plurality of indexes that respectively identify a plurality of symbols whose values are inverted among the symbols included in the error symbol group.

### Claim 7 (depends on 1)

The memory system according to claim 1, wherein each of the first component code and the second component code is a BCH code or a Reed-Solomon code.

### Claim 8 (depends on 1)

The memory system according to claim 1, wherein the nonvolatile memory is a NAND flash memory.

### Claim 9 (depends on 1)

The memory system according to claim 1, wherein the nonvolatile memory is semiconductor memory.

### Claim 10

A memory system, comprising:
a nonvolatile memory configured to store an error correction code; and
a memory controller configured to read data encoded using the error correction code from the nonvolatile memory and execute a decoding process using likelihood information calculated based on the read data, wherein
the decoding process includes:
determining a range of symbols whose values are to be inverted from among a plurality of symbols included in the read error correction code;
determining the positions of a plurality of symbols whose values are to be inverted from among the plurality of symbols included in the range according to a predetermined decision rule;
inverting the values of the plurality of symbols at the determined positions; and
performing a decoding process using the error correction code after the values are inverted, and
the decision rule includes a rule for cyclically shifting the positions decided for the decoding process at the m-th time, where m is an integer of 1 or more, in the range to decide the positions for the decoding process at the (m+1)th time.

### Claim 11 (depends on 10)

The memory system according to claim 10, wherein the decision rule includes:
a rule for selecting a position initial value as a position for the decoding process at the first time; and
a rule for selecting a position for the decoding process after the second time by a position obtained by cyclically shifting the initial value.

### Claim 12 (depends on 11)

The memory system according to claim 11, wherein the decision rule further includes a rule for selecting a new initial value once the cyclically shifted position returns to the initial value.

### Claim 13 (depends on 10)

The memory system according to claim 10, wherein the number of symbols included in the range and the shift amount of the cyclic shift are relatively prime.

### Claim 14 (depends on 10)

The memory system according to claim 10, wherein the nonvolatile memory is a NAND flash memory.

### Claim 15 (depends on 10)

The memory system according to claim 10, wherein the nonvolatile memory is semiconductor memory.