# US 11,309,899 B2 · Time-to-digital conversion circuit and method of the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,309,899 B2
- Document ID: US11309899B2
- Status: Granted
- Kind: B2
- Application number: 17/009,484
- Filed: 2020-09-01
- Published: 2020-12-24
- Granted: 2022-04-19
- Earliest claimed: 2019-03-18
- Assignees: Shenzhen Goodix Technology Co., Ltd.
- Applicants: Shenzhen Goodix Technology Co., Ltd.
- Inventors: Yen-Yin Huang
- Web page: https://patentgrep.com/patent/US11309899B2

## CPC

- H03L 7/0991: {the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider (H03L7/0995 takes precedence; fixed oscillators with means for selecting among various phases H03L7/0814)}
- H03M 1/50: with intermediate conversion to time interval (H03M1/64 takes precedence)
- G04F 10/005: {Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60)}
- H03L 7/0818: {the controlled phase shifter comprising coarse and fine delay or phase-shifting means}
- H03L 7/145: {the switched reference signal being derived from the controlled oscillator output signal}
- H03L 7/148: {said digital means comprising a counter or a divider}
- H03M 1/508: {the pulse width modulator being of the self-oscillating type}
- H03K 3/0315: {Ring oscillators}
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- G04F: TIME-INTERVAL MEASURING (measuring pulse characteristics G01R, e.g. G01R29/02; in radar or like systems G01S)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

The application discloses a time-to-digital conversion circuit (100) including a first oscillator (110), a second oscillator (120), a first counting circuit (130), a second counting circuit (140), a first conversion circuit (150) and a processing circuit (160). The first oscillator is activated by a first signal and includes oscillating units having a first delay amount, wherein the first counting circuit is configured to count a number of times that the first tail end output signal of the first oscillator changes and store the same as a first counting result; the second counting circuit counts a number of oscillating units with an output change, other than the first tail end oscillating unit and stores the same as a second counting result; the first conversion circuit generates a first conversion signal according to the first counting result and the second counting result; the processing circuit generates the output signal at least according to the first conversion signal.

## Claims

### Claim 1

A time-to-digital conversion circuit, characterized by comprising:
a first oscillator, activated by a first signal, wherein the first oscillator comprises a plurality of oscillating units having a first delay amount, wherein a first starting end oscillating unit of the plurality of oscillating units in the first oscillator receives the first signal and a first tail end output signal, and a first tail end oscillating unit of the plurality of oscillating units in the first oscillator is configured to generate the first tail end output signal;
a first counting circuit, coupled to the first oscillator and configured to count a number of times that the first tail end output signal changes, and store the counted number as a first counting result;
a second counting circuit, coupled to the first oscillator, and configured to count a number of oscillating units with an output change, other than the first tail end oscillating unit, whenever an output of the first starting end oscillating unit changes, and store the number of the oscillating units as a second counting result;
a second oscillator, coupled to the first oscillator through the first counting circuit and the second counting circuit, wherein the second oscillator is activated by a second signal;
a first conversion circuit, coupled to the first counting circuit and the second counting circuit and configured to generate a first conversion signal according to the first delay amount and the first counting result and the second counting result stored when the second oscillator is activated, wherein the first conversion signal indicates a first estimated time difference; and
a processing circuit, coupled to the first conversion circuit and configured to generate an output signal at least according to the first conversion signal, wherein the output signal represents a measured time difference between an activation time of the first signal and an activation time of the second signal.

### Claim 2 (depends on 1)

The time-to-digital conversion circuit of claim 1, characterized in that the second oscillator comprises a plurality of oscillating units having a second delay amount, wherein a second starting end oscillating unit of the plurality of oscillating units in the second oscillator receives the second signal and a second tail end output signal, and a second tail end oscillating unit of the plurality of oscillating units generates the second tail end output signal.

### Claim 3 (depends on 2)

The time-to-digital conversion circuit of claim 2, characterized by further comprising:
a third counting circuit, coupled to the second oscillator, and configured to count a number of times that the second tail end output signal changes, and store the counted number as a third counting result; and
a fourth counting circuit, coupled to the second oscillator, and configured to count a number of oscillating units with an output change in the second oscillator, other than the second tail end oscillating unit, and store the number of the oscillating units with the output change other than the second tail end oscillating unit in the second oscillator as a fourth counting result.

### Claim 4 (depends on 2)

The time-to-digital conversion circuit of claim 2, characterized in that the first counting circuit is further configured to count a number of times that the second tail end output signal changes after the second oscillator is activated, and store the counted number as a third counting result; and the second counting circuit is further configured to count a number of oscillating units with an output change, other than the second tail end oscillating unit, after the second oscillator is activated, and store the number of the oscillating units as a fourth counting result.

### Claim 5 (depends on 4)

The time-to-digital conversion circuit of claim 4, characterized by further comprising:
a second conversion circuit, configured to generate a second conversion signal according to the first delay amount, the second delay amount, the third counting result and the fourth counting result, after the second oscillator is activated, wherein the second conversion signal indicates a second estimated time difference, and the second estimated time difference is smaller than the first delay amount.

### Claim 6 (depends on 5)

The time-to-digital conversion circuit of claim 5, characterized in that the processing circuit generates the output signal according to the first conversion signal and the second conversion signal.

### Claim 7 (depends on 5)

The time-to-digital conversion circuit of claim 5, characterized in that the second conversion circuit comprises:
a logic circuit, configured to receive outputs of the plurality of oscillating units in the first oscillator after the second oscillator is activated and when the output of any oscillating unit in the second oscillator changes, and perform a logic operation to generate a logic result at least according to the output of the plurality of oscillating units in the first oscillator and the output of the oscillating unit with the output change in the second oscillator.

### Claim 8 (depends on 7)

The time-to-digital conversion circuit of claim 7, characterized in that the second conversion circuit generates the second conversion signal according to the first delay amount, the second delay amount, and the third counting result and the fourth counting result obtained when the logic result changes.

### Claim 9 (depends on 7)

The time-to-digital conversion circuit of claim 7, characterized by further comprising:
a detection circuit, configured to selectively adjust oscillation frequency of the second oscillator according to the logic result.

### Claim 10 (depends on 9)

The time-to-digital conversion circuit of claim 9, characterized in that the second conversion circuit generates the second conversion signal according to the first delay amount, the second delay amount, and the third counting result and the fourth counting result obtained after the oscillation frequency of the second oscillator changes and when the logic result changes.

### Claim 11

A time-to-digital conversion method, characterized by comprising:
transmitting a first signal to activate a first oscillator, wherein the first oscillator comprises a plurality of oscillating units having a first delay amount, and a first starting end oscillating unit of the plurality of oscillating units in the first oscillator receives the first signal and a first tail end output signal, wherein a first tail end oscillating unit of the plurality of oscillating units is configured to generate the first tail end output signal;
transmitting a second signal to activate a second oscillator;
counting a number of times that the first tail end output signal changes, and storing the counted number as a first counting result;
counting a number of oscillating units with an output change, other than the first tail end oscillating unit, whenever an output of the first starting end oscillating unit changes, and storing the number of the oscillating units as a second counting result;
generating a first conversion signal according to the first delay amount and the first counting result and the second counting result stored when the second oscillator is activated, wherein the first conversion signal indicates a first estimated time difference; and
generating an output signal at least according to the first conversion signal, wherein the output signal represents a measured time difference between an activation time of the first signal and an activation time of the second signal.

### Claim 12 (depends on 11)

The time-to-digital conversion method of claim 11, characterized in that the second oscillator comprises a plurality of oscillating units having a second delay amount, and a second starting end oscillating unit of the plurality of oscillating units in the second oscillator receives the second signal and a second tail end output signal, and a second tail end oscillating unit of the plurality of oscillating units generate the second tail end output signal.

### Claim 13 (depends on 12)

The time-to-digital conversion method of claim 12, characterized by further comprising:
counting a number of times that the second tail end output signal changes, and store the counted number as a third counting result; and
counting a number of oscillating units with an output change in the second oscillator, other than the second tail end oscillating unit, and store the number of the oscillating units with the output change other than the second tail end oscillating unit in the second oscillator as a fourth counting result.

### Claim 14 (depends on 12)

The time-to-digital conversion method of claim 12, characterized in further comprising:
counting a number of times that the second tail end output signal changes after the second oscillator is activated, and storing the counted number as a third counting result; and
counting a number of oscillating units with an output change, other than the second tail end oscillating unit, after the second oscillator is activated, and storing the number of the oscillating units as a fourth counting result.

### Claim 15 (depends on 14)

The time-to-digital conversion method of claim 14, characterized by further comprising:
generating a second conversion signal according to the first delay amount, the second delay amount, the third counting result and the fourth counting result, after the second oscillator is activated, wherein the second conversion signal indicates a second estimated time difference, and the second estimated time difference is smaller than the first delay amount.

### Claim 16 (depends on 15)

The time-to-digital conversion method of claim 15, characterized in that, at least according to the first conversion signal to generate the output signal comprises:
generating the output signal according to the first conversion signal and the second conversion signal.

### Claim 17 (depends on 15)

The time-to-digital conversion method of claim 15, characterized in that generating the second conversion signal according to the first delay amount, the second delay amount, the third counting result and the fourth counting result comprises:
receiving outputs of the plurality of oscillating units in the first oscillator after the second oscillator is activated and when the output of any oscillating unit in the second oscillator changes; and
performing a logic operation to generate a logic result at least according to the output of the plurality of oscillating units in the first oscillator and the output of the oscillating unit with the output change in the second oscillator.

### Claim 18 (depends on 17)

The time-to-digital conversion method of claim 17, characterized in that generating the second conversion signal according to the first delay amount, the second delay amount, the third counting result and the fourth counting result comprises:
generating the second conversion signal according to the first delay amount, the second delay amount and the third counting result and the fourth counting result obtained when the logic result changes.

### Claim 19 (depends on 17)

The time-to-digital conversion method of claim 17, characterized by further comprising:
selectively adjusting oscillation frequency of the second oscillator according to the logic result.

### Claim 20 (depends on 19)

The time-to-digital conversion method of claim 19, characterized in that generating the second conversion signal according to the first delay amount, the second delay amount, the third counting result and the fourth counting result comprises:
generating the second conversion signal according to the first delay amount, the second delay amount, and the third counting result and the fourth counting result obtained after the oscillation frequency of the second oscillator changes and when the logic result changes.