# US 11,309,799 B2 · Power supply device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,799 B2 - Document ID: US11309799B2 - Status: Granted - Kind: B2 - Application number: 16/880,876 - Filed: 2020-05-21 - Published: 2020-11-26 - Granted: 2022-04-19 - Earliest claimed: 2019-05-24 - Assignees: STMicroelectronics (Grenoble 2) SAS - Applicants: Stmicroelectronics (Grenoble 2) SAS - Inventors: Jean Camiolo; Alexandre Pons - Web page: https://patentgrep.com/patent/US11309799B2 ## CPC - G05F 1/575: characterised by the feedback circuit - H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)} - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 1/266: {Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips} - H02J 7/485: {with provisions for charging different types of batteries} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - G06F 2213/0042: Universal serial bus [USB] - H02J 2207/30: Charge provided using DC bus or data bus of a computer - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 1/0032: {Control circuits allowing low power mode operation, e.g. in standby mode} - Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY - Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS ## Abstract The present disclosure concerns a device comprising: a voltage converter supplying, from a first DC voltage, a second DC voltage on an output terminal of the converter having a current value determined by a third voltage on a control terminal of the converter; a circuit configured, when a set point value of the second voltage switches from a first to a second set point value smaller than the first value, to generate a ramp signal successively representative of the first value, of a plurality of decreasing intermediate values between the first and second values, and of the second value; and an amplifier supplying a first signal representative of a difference between the ramp signal and a signal representative of the current value of the second voltage, the third voltage being determined by the first signal. ## Claims ### Claim 1 A device comprising: a voltage converter configured to supply, from a first voltage, a second voltage on an output terminal of the converter having a current value determined by a third voltage on a control terminal of the converter; a ramp generation circuit configured, when a set point value of the second voltage switches from a first set point value to a second set point value smaller than the first set point value, to generate a first signal that includes a ramp successively representative of the first set point value, of a plurality of decreasing intermediate values between the first and second set point values, and of the second set point value; an error amplifier configured to supply a second signal representative of a difference between the first signal and a third signal representative of the current value of the second voltage; and a feedback control circuit configured to set the third voltage based on the second signal. ### Claim 2 (depends on 1) The device of claim 1, wherein the ramp generation circuit is configured to select the first and second set point values from a set of predefined set point values. ### Claim 3 (depends on 1) The device of claim 1, wherein the first set point value is smaller than a predefined set point value selected from a set of predefined set point values, the first set point value being determined from the selected predefined set point value, and the second set point value being selected from said set of predefined set point values. ### Claim 4 (depends on 3) The device of claim 3, wherein the ramp generation circuit is configured to select the first set point value from a difference between a current available on the output terminal of the converter and a predefined maximum current. ### Claim 5 (depends on 3) The device of claim 3, wherein said ramp generation circuit is configured, when the set point value of the second voltage switches from the first set point value to the second set point value, to: store a fourth signal representative of the first set point value; generate a fifth signal that includes a ramp successively representative of said selected predefined set point value, of a plurality of decreasing intermediate values between the selected predefined set point value and the second set point value, and of the second set point value; and generate the first signal equal to the fourth signal until the fifth signal is equal to the fourth signal, and then equal to the fifth signal. ### Claim 6 (depends on 5) The device of claim 5, wherein the ramp generation circuit comprises a comparator configured to supply a sixth signal representative of the comparison of the fourth signal with the fifth signal. ### Claim 7 (depends on 6) The device of claim 6, wherein the ramp generation circuit is configured to generate the first signal from the fourth, fifth, and sixth signals. ### Claim 8 (depends on 1) The device of any of claim 1, wherein the feedback control circuit includes: a voltage dividing bridge connected between the output terminal of the converter and a node of application of a reference potential, an intermediate node of said voltage dividing bridge being connected to the control terminal of the converter; and a transistor is connected between the intermediate node of said voltage dividing bridge and the node of application of the reference potential, a control terminal of the transistor being configured to receive the second signal. ### Claim 9 (depends on 1) The device of claim 1, wherein the ramp generation circuit comprises a state machine and a digital-to-analog converter. ### Claim 10 (depends on 9) The device of claim 9, wherein the state machine is configured to, when the set point value of the second voltage switches from the first set point value to the second set point value, successively supply binary control codes to the digital-to-analog converter, said codes being representative respectively of the first set point value, of said decreasing intermediate values, and of the second set point value, the digital-to-analog converter having an output terminal configured to provide the first signal. ### Claim 11 (depends on 9) The device of claim 9, wherein: said ramp generation circuit is configured, when the set point value of the second voltage switches from the first set point value to the second set point value, to: store a fourth signal representative of the first set point value; generate a fifth signal that includes a ramp successively representative of said selected predefined set point value, of a plurality of decreasing intermediate values between the selected predefined set point value and the second set point value, and of the second set point value; and generate the first signal equal to the fourth signal until the fifth signal is equal to the fourth signal, and then equal to the fifth signal; and the state machine is configured to, when the set point value of the second voltage switches from the first set point value to the second set point value, successively supply binary control codes to the digital-to-analog converter, said codes being representative respectively of said first set point value, of said plurality of decreasing intermediate values between the first set point value and the second set point value, and of the second set point value, the digital-to-analog converter having an output terminal configured to provide the fifth signal. ### Claim 12 (depends on 11) The device of claim 11, wherein the ramp generation circuit includes: a first switch coupling the output terminal of the digital-to-analog converter to a first internal node; and a capacitor connected to the first internal node; and a second switch coupling a second internal node to the first internal node, the first signal being available on the first internal node and the fourth signal being available on the second internal node. ### Claim 13 (depends on 12) The device of claim 12, wherein the state machine is configured to: turn off the second switch when the set point value of the second voltage switches from the first set point value to the second set point value; and turn on the first switch when the fifth signal becomes equal to the fourth signal. ### Claim 14 A device comprising: a power source configured to supply a first voltage; a USB-C connector; and a connection interface coupled between the power source and the USB-C connector, the connection interface including: a voltage converter configured to supply, from the first voltage, a second voltage on an output terminal of the converter having a current value determined by a third voltage on a control terminal of the converter, the output terminal of the converter being coupled to the USB-C connector; a ramp generation circuit configured, when a set point value of the second voltage switches from a first set point value to a second set point value smaller than the first set point value, to generate a first signal that includes a ramp successively representative of the first set point value, of a plurality of decreasing intermediate values between the first and second set point values, and of the second set point value; an error amplifier configured to supply a second signal representative of a difference between the first signal and a third signal representative of the current value of the second voltage; and a feedback control circuit configured to set the third voltage based on the second signal. ### Claim 15 (depends on 14) The device of any of claim 14, wherein the feedback control circuit includes: a voltage dividing bridge connected between the output terminal of the converter and a node of application of a reference potential, an intermediate node of said voltage dividing bridge being connected to the control terminal of the converter; and a transistor is connected between the intermediate node of said voltage dividing bridge and the node of application of the reference potential, a control terminal of the transistor being configured to receive the second signal. ### Claim 16 (depends on 14) The device of claim 14, wherein the ramp generation circuit comprises: a state machine configured to, when the set point value of the second voltage switches from the first set point value to the second set point value, successively supply binary control codes, said codes being representative respectively of the first set point value, of said decreasing intermediate values, and of the second set point value; and a digital-to-analog converter having an input terminal, configured to receive the binary control codes from the state machine, and an output terminal configured to provide the first signal. ### Claim 17 (depends on 14) The device of claim 14, wherein: the first set point value is smaller than a predefined set point value selected from a set of predefined set point values, the first set point value being determined from the selected predefined set point value, and the second set point value being selected from said set of predefined set point values; said ramp generation circuit is configured, when the set point value of the second voltage switches from the first set point value to the second set point value, to: store a fourth signal representative of the first set point value; generate a fifth signal that includes a ramp successively representative of said selected predefined set point value, of a plurality of decreasing intermediate values between the selected predefined set point value and the second set point value, and of the second set point value; and generate the first signal equal to the fourth signal until the fifth signal is equal to the fourth signal, and then equal to the fifth signal; and said ramp generation circuit includes: a state machine configured to, when the set point value of the second voltage switches from the first set point value to the second set point value, successively supply binary control codes, said codes being representative respectively of said first set point value, of said plurality of decreasing intermediate values between the first set point value and the second set point value, and of the second set point value; and a digital-to-analog converter having an input terminal, configured to receive the binary control codes from the state machine, and an output terminal configured to provide the fifth signal. ### Claim 18 A method, comprising: controlling a voltage converter supplying, from a first voltage, a second voltage having a current value determined by a third voltage, the controlling including, when a set point value of the second voltage switches from a first set point value to a second set point value smaller than the first set point value; generating a first ramp signal successively representative of the first set point value, of a plurality of decreasing intermediate values in a range from the first and second set point values, and of the second set point value; an error amplifier supplying a second signal representative of a difference between the first signal and a third signal representative of the current value of the second voltage; and determining the third voltage from the second signal. ### Claim 19 (depends on 18) The method of claim 18, wherein the first set point value is smaller than a predefined set point value selected from a set of predefined set point values, the first set point value being determined from the selected predefined set point value, and the second set point value being selected from said set of predefined set point values. ### Claim 20 (depends on 19) The method of claim 19, wherein the first set point value is further determined from a difference between a current available on the output terminal of the converter and a predefined maximum current.