# US 11,309,705 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,705 B2 - Document ID: US11309705B2 - Status: Granted - Kind: B2 - Application number: 17/004,704 - Filed: 2020-08-27 - Published: 2021-04-15 - Granted: 2022-04-19 - Earliest claimed: 2019-10-09 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Akio Kamimoto - Web page: https://patentgrep.com/patent/US11309705B2 ## CPC - H02H 7/18: for batteries; for accumulators - H02H 1/0007: {concerning the detecting means (in general G01R or other subclasses of G01; reed switches H01H71/2445)} - H02H 11/002: {in case of inverted polarity or connection; with switching for obtaining correct connection} - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03K 5/24: the characteristic being amplitude - H03F 2203/45138: Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers - H03F 2203/45528: the FBC comprising one or more passive resistors and being coupled between the LC and the IC - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - H03F: AMPLIFIERS - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A semiconductor device includes a bridge circuit comprising first to fourth elements, a first diagnostic circuit that detects a potential difference between two intermediate nodes of the bridge circuit and a control circuit that detects a failure of the first or second element based on an output of the first diagnostic circuit, wherein the first and second elements are first and second power transistors connected in series. ## Claims ### Claim 1 A semiconductor device comprising: a bridge circuit that includes first to fourth elements; a first diagnostic circuit that detects a potential difference between two intermediate nodes of the bridge circuit; and a control circuit that detects a failure of the first element or the second element based on an output of the first diagnostic circuit, wherein the first and second elements are first and second power transistors connected in series, wherein the first power transistor receives power supply from a battery and is a reverse connection protection transistor of the battery, wherein the first diagnostic circuit has a first voltage determination circuit that determines whether the potential difference between the two intermediate nodes is equal to or greater than a predetermined value, wherein the third and fourth elements are first and second sense transistors connected in series, and wherein the first voltage determination circuit determines a potential difference between a first intermediate node to which the first and second power transistors are connected and a second intermediate node to which the first and second sense transistors are connected. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first diagnostic circuit further includes a first differential amplifier circuit that amplifies the potential difference between the first and second intermediate nodes, and wherein the first voltage determination circuit determines whether the amplified potential difference is equal to or greater than a predetermined value. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, a current sense ratio between the first power transistor and the first sense transistor is substantially the same as a current sense ratio between the second power transistor and the second sense transistor. ### Claim 4 (depends on 2) The semiconductor device according to claim 2, wherein the first differential amplifier circuit comprises: a first operational amplifier, a first resistor coupled between a non-inverting input of the first operational amplifier and a power line from the battery, and a second resistor coupled between an inverting input of the first operational amplifier and an output of the first operational amplifier, and wherein the inverting input of the first operational amplifier is coupled to the first intermediate node and the non-inverting input of the first operational amplifier is coupled to the second intermediate node. ### Claim 5 (depends on 4) The semiconductor device according to claim 4, wherein the first voltage determination circuit comprises: a first comparator, a first reference voltage circuit, and wherein an inverting input of the first comparator is coupled to an output of the first differential amplifier circuit and a voltage stepped down from a supplied voltage from the battery by the first reference voltage circuit is supplied to a non-inverting input of the first comparator. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, further comprising: a second diagnostic circuit, wherein the first diagnostic circuit determines whether a voltage of the first intermediate node is higher than a voltage of the second intermediate node or not, and wherein the second diagnostic circuit determines whether the voltage of the second intermediate node is higher than the voltage of the first intermediate node or not. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the first diagnostic circuit has a first differential amplifier circuit and a first voltage determination circuit, wherein the second diagnostic circuit has a second differential amplifier circuit and a second voltage determination circuit, wherein the first differential amplifier circuit has a first operational amplifier, a first resistor coupled between a non-inverting input of the first operational amplifier and a power line from the battery and a second resistor coupled between an inverting input of the first operational amplifier and the output of the first operational amplifier, wherein the inverting input of the first operational amplifier is coupled to the first intermediate node and the non-inverting input of the first operational amplifier is coupled to the second intermediate node, wherein the second differential amplifier circuit has a second operational amplifier, a third resistor coupled between a non-inverting input of the second operational amplifier and the power line from the battery and a fourth resistor coupled between an inverting of the second operational amplifier input and the output of the second operational amplifier, wherein the inverting input of the second operational amplifier is coupled to the second intermediate node and the non-inverting input of the second operational amplifier is coupled to the first intermediate node, wherein the first voltage determination circuit has a first comparator and a first reference voltage circuit, wherein an inverting input of the first comparator is coupled to an output of the first differential amplifier circuit and a voltage stepped down from a supplied voltage from the battery by the first reference voltage circuit is supplied to a non-inverting input of the first comparator, wherein the second voltage determination circuit has a second comparator and a second reference voltage circuit, and wherein an inverting input of the second comparator is coupled to an output of the second differential amplifier circuit and a voltage stepped down from the supplied voltage from the battery by the second reference voltage circuit is supplied to a non-inverting input of the second comparator. ### Claim 8 A semiconductor device comprising: a bridge circuit that includes first to fourth elements; a first diagnostic circuit that detects a potential difference between two intermediate nodes of the bridge circuit; and a control circuit that detects a failure of the first element or the second element based on an output of the first diagnostic circuit, wherein the first and second elements are first and second power transistors connected in series, wherein the first power transistor receives power supply from a battery and is a reverse connection protection transistor of the battery, wherein the first diagnostic circuit has a first voltage determination circuit that determines whether the potential difference between the two intermediate nodes is equal to or greater than a predetermined value, wherein the third and fourth elements are first and second resistors connected in series, and wherein the first voltage determination circuit determines a potential difference between a first intermediate node to which the first and second power transistors are coupled and a second intermediate node to which the first and second resistors are coupled. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein the first diagnostic circuit further includes a first differential amplifier circuit that amplifies the potential difference between the first and second intermediate nodes, and wherein the first voltage determination circuit determines whether the amplified potential difference is equal to or greater than a predetermined value or not. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, wherein a ratio of on-resistance values of the first and second power transistors is substantially the same as a ratio of resistance values of the first and second resistors. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, wherein the first differential amplifier circuit comprises: a first operational amplifier, a first resistor coupled between a non-inverting input of the first operational amplifier and a power line from the battery, and a second resistor coupled between an inverting input of the first operational amplifier and an output of the first operational amplifier, and wherein the inverting input of the first operational amplifier is coupled to the first intermediate node and the non-inverting input of the first operational amplifier is coupled to the second intermediate node. ### Claim 12 (depends on 11) The semiconductor device according to claim 11, wherein the first voltage determination circuit comprises: a first comparator, and a first reference voltage circuit, and wherein an inverting input of the first comparator is coupled to an output of the first differential amplifier circuit and a voltage stepped down from a supplied voltage from the battery by the first reference voltage circuit is supplied to a non-inverting input of the first comparator. ### Claim 13 (depends on 4) The semiconductor device according to claim 4, further comprising: a first reference voltage circuit, wherein a first voltage stepped down from a supplied voltage from the battery by the first reference voltage circuit is supplied to the non-inverting input of the first operational amplifier through the first resistor, wherein the first voltage determination circuit has first and second comparators and second and third reference voltage circuits, wherein an inverting input of the first comparator and a non-inverting input of the second comparator are coupled to an output of the first differential amplifier, wherein a voltage stepped down from the first voltage by the second reference voltage circuit is supplied to a non-inverting input of the first comparator, and wherein a voltage boosted from the first voltage by the third reference voltage circuit is supplied to an inverting input of the second comparator. ### Claim 14 (depends on 1) The semiconductor device according to claim 1, further comprising: a second voltage determination circuit, wherein a non-inverting input of the first voltage determination circuit and an inverting input of the second voltage determination circuit are coupled to the first intermediate node, wherein an inverting input of the first voltage determination circuit and a non-inverting input of the second voltage determination circuit are coupled to the second intermediate node, and wherein an offset voltage is set to the inverting input of each of the first and second voltage determination circuits. ### Claim 15 (depends on 4) The semiconductor device according to claim 4, wherein the first voltage determination circuit has a first comparator, a plurality of reference voltage circuits and a plurality of switches each of which is coupled to each of reference voltage circuits respectively, wherein an inverting input of the first comparator is coupled to an output of the first differential amplifier circuit, and wherein a voltage stepped down from a supplied voltage from the battery by one of the reference voltage circuits selected by the switches is supplied to a non-inverting input of the first comparator.