# US 11,309,490 B2 · Memory devices and methods of forming the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,309,490 B2
- Document ID: US11309490B2
- Status: Granted
- Kind: B2
- Application number: 16/785,673
- Filed: 2020-02-10
- Published: 2021-08-12
- Granted: 2022-04-19
- Earliest claimed: 2020-02-10
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Chao-I Wu
- Web page: https://patentgrep.com/patent/US11309490B2

## CPC

- H10B 63/22: {of the metal-insulator-metal type}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10B 63/24: {of the Ovonic threshold switching type}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/828: {Current flow limiting means within the switching material region, e.g. constrictions}
- H10N 70/841: {Electrodes}
- H10N 70/8413: {adapted for resistive heating}
- H10N 70/8613: {Heating or cooling means other than resistive heating electrodes, e.g. heater in parallel}
- H10N 70/883: {Oxides or nitrides}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10N 70/884: {based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors (compounds of sulfur, selenium or tellurium, e.g. chalcogenides H10N70/882; oxides or nitrides H10N70/883)}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

Memory devices and methods of forming the same are provided. A memory device includes a substrate, a first conductive layer, a phase change layer, a selector layer and a second conductive layer. The first conductive layer is disposed over the substrate. The phase change layer is disposed over the first conductive layer. The selector layer is disposed between the phase change layer and the first conductive layer. The second conductive layer is disposed over the phase change layer. In some embodiments, at least one of the phase change layer and the selector layer has a narrow-middle profile.

## Claims

### Claim 1

A memory device, comprising:
a substrate;
a first conductive layer disposed over the substrate;
a phase change layer disposed over the first conductive layer;
a selector layer disposed between the phase change layer and the first conductive layer; and
a second conductive layer disposed over the phase change layer,
wherein at least one of the phase change layer and the selector layer has a narrow-middle profile that comprises a middle portion narrower than a top portion and a bottom portion of the same layer.

### Claim 2 (depends on 1)

The memory device of claim 1, wherein a projection area of the second conductive layer on the substrate is substantially equal to or greater than a projection area of the phase change layer on the substrate.

### Claim 3 (depends on 1)

The memory device of claim 1, further comprising a first intermediate layer between the selector layer and the first conductive layer.

### Claim 4 (depends on 3)

The memory device of claim 3, wherein the first intermediate layer comprises tungsten (W), graphene, MoS2, carbon (C), titanium (Ti), tantalum (Ta), tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN) or a combination thereof.

### Claim 5 (depends on 1)

The memory device of claim 1, further comprising a second intermediate layer between the phase change layer and the selector layer.

### Claim 6 (depends on 5)

The memory device of claim 5, wherein the second intermediate layer comprises tungsten (W), graphene, MoS2, carbon (C), titanium (Ti), tantalum (Ta), tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN) or a combination thereof.

### Claim 7 (depends on 1)

The memory device of claim 1, further comprising a third intermediate layer between the phase change layer and the second conductive layer.

### Claim 8 (depends on 7)

The memory device of claim 7, wherein the third intermediate layer comprises tungsten (W), graphene, MoS2, carbon (C), titanium (Ti), tantalum (Ta), tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN) or a combination thereof.

### Claim 9 (depends on 1)

The memory device of claim 1, wherein only one of the phase change layer and the selector layer has the narrow-middle profile.

### Claim 10 (depends on 1)

The memory device of claim 1, wherein each of the phase change layer and the selector layer has the narrow-middle profile.

### Claim 11 (depends on 1)

The memory device of claim 1, further comprising:
a dielectric layer disposed aside the phase change layer and the selector layer; and
a liner layer disposed between the dielectric layer and each of the phase change layer and the selector layer.

### Claim 12

A memory device, comprising:
a substrate;
a first conductive layer disposed over the substrate;
a second conductive layer disposed over the first conductive layer;
a phase change layer and a selector layer disposed between the first conductive layer and the second conductive layer; and
a heater disposed between the phase change layer and the selector layer, wherein a smallest width of the heater is wider than a smallest width of the phase change layer or a smallest width of the selector layer,
wherein the selector layer comprises a bottom portion, a middle portion and a top portion, and a width of the middle portion is smaller than each of a width of the bottom portion and a width of the top portion.

### Claim 13 (depends on 12)

The memory device of claim 12, wherein the phase change layer comprises a bottom portion, a middle portion and a top portion, and a width of the middle portion is smaller than each of a width of the bottom portion and a width of the top portion.

### Claim 14 (depends on 12)

The memory device of claim 12, wherein a bottom width of the phase change layer is less than a top width of the heater.

### Claim 15 (depends on 12)

The memory device of claim 12, wherein the heater comprises tungsten (W), titanium (Ti), tantalum (Ta), tungsten nitride (WN), titanium nitride (TiN), tantalum nitride (TaN) or a combination thereof.

### Claim 16

A memory device, comprising:
a substrate;
a lower interconnect line disposed over the substrate and extending in a first direction;
an upper interconnect line disposed over the lower interconnect line and extending in a second direction different from the first direction; and
a phase change layer and a selector layer disposed between the lower interconnect line and the upper interconnect line,
wherein facing sidewalls of one of the phase change layer and the selector layer are recessed inwardly without a turning point.

### Claim 17 (depends on 16)

The memory device of claim 16, wherein the facing sidewalls of the phase change layer are recessed inwardly without a turning point, while the facing sidewalls of the selector layer are substantially straight.

### Claim 18 (depends on 16)

The memory device of claim 16, further comprising a heater disposed between the phase change layer and the selector layer and having a substantially straight sidewall.

### Claim 19 (depends on 18)

The memory device of claim 18, wherein a portion of the heater is exposed by the phase change layer.

### Claim 20 (depends on 17)

The memory device of claim 17, wherein a sidewall profile of the phase change layer is similar to a sidewall profile of the selector layer.