Back to results
US 11,309,436 B2Granted
Semiconductor memory device
AssigneeSK hynix Inc.
InventorsDong Uk Lee, Hae Chang Yang
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device includes, a stack structure, and a channel structure passing through the stack structure, wherein the channel structure includes a channel layer passing through the stack structure and a memory layer surrounding the channel layer, the stack structure includes a gate contacting the channel layer, and the channel layer and the gate form a Schottky junction.
Claims19
A semiconductor memory device, comprising:
- a stack structure;
- and
- a channel structure passing through the stack structure,
- wherein the channel structure includes a channel layer passing through the stack structure and a memory layer surrounding the channel layer,
- the stack structure includes a source select gate contacting the channel layer, and
- the channel layer and the source select gate configured to form a Schottky junction,
- wherein the source select gate and the channel layer are in direct contact with each other.
4 more elements
A semiconductor memory device, comprising:
- a stack structure;
- and
- a channel structure passing through the stack structure,
- wherein the channel structure includes a channel layer passing through the stack structure and a memory layer surrounding the channel layer,
- the stack structure includes a drain select gate contacting the channel layer, and
- the channel layer and the drain select gate configured to form a Schottky junction,
- wherein the drain select gate and the channel layer are in direct contact with each other.
4 more elements
A semiconductor memory device, comprising:
- a source layer;
- a stack structure on the source layer;
- and
- a channel structure passing through the stack structure;
- and
- a bit line electrically coupled to the channel structure,
- wherein the channel structure includes a channel layer passing through the stack structure and a memory layer surrounding the channel layer,
- the stack structure includes a source select gate contacting a lower portion of the channel layer and a drain select gate contacting an upper portion of the channel layer,
- the channel layer and the source select gate are configured to form a Schottky junction, and
- the channel layer and the drain select gate are configured to form a Schottky junction, and
- wherein the source select gate and the channel layer are in direct contact with each other, and the drain select gate and the channel layer are in direct contact with each other.
8 more elements
Dependencies are inferred from the claim text.