# US 11,309,434 B2 · Semiconductor device and method of producing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,434 B2 - Document ID: US11309434B2 - Status: Granted - Kind: B2 - Application number: 16/815,621 - Filed: 2020-03-11 - Published: 2020-09-17 - Granted: 2022-04-19 - Earliest claimed: 2019-03-14 - Assignees: Infineon Technologies Dresden GmbH - Applicants: Infineon Technologies Dresden GmbH & Co. KG - Inventors: Ahmed Mahmoud; Rolf Weis; Armin Willmeroth - Web page: https://patentgrep.com/patent/US11309434B2 ## CPC - H10D 30/83: FETs having PN junction gate electrodes - H10D 30/0512: {of FETs having PN homojunction gates} - H10D 62/102: {Constructional design considerations for preventing surface leakage or controlling electric field concentration} - H10D 62/111: {Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures} - H10D 62/343: {Gate regions of field-effect devices having PN junction gates} - H10D 84/82: of only field-effect components - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A semiconductor device includes a layer stack with a plurality of first semiconductor layers of a first doping type and a plurality of second semiconductor layers of a second doping type complementary to the first doping type. A first semiconductor region of a first semiconductor device adjoins the first semiconductor layers. Each second semiconductor region of the first semiconductor device adjoins at least one of the second semiconductor layers, and is spaced apart from the first semiconductor region. A third semiconductor layer adjoins the layer stack and each first semiconductor region and each second semiconductor region. The third semiconductor layer includes a first region arranged between the first semiconductor region and the second semiconductor region in a first direction. A third semiconductor region of the first or the second doping type extends from a first surface of the third semiconductor layer into the first region. ## Claims ### Claim 1 A semiconductor device, comprising: a layer stack with a plurality of first semiconductor layers of a first doping type and a plurality of second semiconductor layers of a second doping type complementary to the first doping type; a first semiconductor region of a first semiconductor device adjoining the plurality of first semiconductor layers; at least one second semiconductor region of the first semiconductor device, wherein each of the at least one second semiconductor region adjoins at least one of the plurality of second semiconductor layers, and is spaced apart from the first semiconductor region; a third semiconductor layer adjoining the layer stack and each of the first semiconductor region, and the at least one second semiconductor region, wherein the third semiconductor layer comprises a first region arranged between the first semiconductor region and the at least one second semiconductor region in a first direction, and a third semiconductor region of the first or the second doping type, extending from a first surface of the third semiconductor layer into the first region; and a fourth semiconductor region of a doping type complementary to the doping type of the third semiconductor region, and extending from the first surface of the third semiconductor layer into the first region, wherein the first semiconductor device is a transistor device and the at least one second semiconductor region is a gate region of the transistor device, or the first semiconductor device is a diode device and the at least one second semiconductor region forms an anode of the diode device, wherein the third semiconductor layer has a first thickness in a vertical direction that is perpendicular to the first direction, wherein the third semiconductor region has a second thickness and the fourth semiconductor region has a third thickness in the vertical direction, wherein the second thickness and the third thickness each are less than the first thickness. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein either the third semiconductor region is arranged adjacent to the at least one second semiconductor region and, in the first direction, extends from the at least one second semiconductor region towards the first semiconductor region, or the third semiconductor region is arranged adjacent to the first semiconductor region and, in the first direction, extends from the first semiconductor region towards the at least one second semiconductor region. ### Claim 3 (depends on 1) The semiconductor device of claim 1, further comprising a fourth semiconductor region of a doping type complementary to the doping type of the third semiconductor region, and extending from the first surface of the third semiconductor layer into the first region. ### Claim 4 (depends on 3) The semiconductor device of claim 3, wherein the third semiconductor region is arranged adjacent to the at least one second semiconductor region and, in the first direction, extends from the at least one second semiconductor region towards the first semiconductor region, and wherein the fourth semiconductor region is arranged adjacent to the first semiconductor region and, in the first direction, extends from the first semiconductor region towards the at least one second semiconductor region. ### Claim 5 (depends on 4) The semiconductor device of claim 4, wherein the fourth semiconductor region is spaced apart from the third semiconductor region in the first direction, and wherein a distance between the third semiconductor region and the fourth semiconductor region in the first direction is between 0% and 50% of a distance between the first semiconductor region and the at least one second semiconductor region. ### Claim 6 (depends on 3) The semiconductor device of claim 3, wherein a doping concentration of the third semiconductor region equals a doping concentration of the plurality of first semiconductor layers, and wherein a doping concentration of the fourth semiconductor region equals a doping concentration of the plurality of second semiconductor layers. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein the first thickness is between 4 μm and 24 μm. ### Claim 8 (depends on 1) The semiconductor device of claim 1, wherein the fourth semiconductor region is spaced apart from the third semiconductor region in the first direction, and wherein a distance between the third semiconductor region and the fourth semiconductor region in the first direction is between 0% and 50% of a distance between the first semiconductor region and the at least one second semiconductor region in the first direction. ### Claim 9 (depends on 1) The semiconductor device of claim 1, wherein a doping concentration of the third semiconductor region equals a doping concentration of the plurality of first semiconductor layers, and wherein a doping concentration of the fourth semiconductor region equals a doping concentration of the plurality of second semiconductor layers. ### Claim 10 (depends on 1) The semiconductor device of claim 1, wherein a doping concentration of the plurality of first semiconductor layers is in a range of between 1E13 cm-3 and 1E18 cm-3, or between 1E14 cm-3 and 5E17 cm-3. ### Claim 11 (depends on 1) The semiconductor device of claim 1, wherein a doping concentration of the plurality of second semiconductor layers is in a range of between 1E13 cm-3 and 1E18 cm-3, or between 1E14 cm-3 and 5E17 cm-3. ### Claim 12 (depends on 1) The semiconductor device of claim 1, wherein a doping concentration of the first region of the third semiconductor layer is in a range of between 1E12 cm-3 and 1E15 cm-3. ### Claim 13 (depends on 1) The semiconductor device of claim 1, wherein a doping concentration of the first region of the third semiconductor layer is lower than a doping concentration of the plurality of second semiconductor layers. ### Claim 14 (depends on 1) The semiconductor device of claim 1, further comprising a fifth semiconductor region adjoining the plurality of first semiconductor layers, wherein the first semiconductor region is spaced apart from the fifth semiconductor region in the first direction, wherein the at least one second semiconductor region is arranged between the fifth semiconductor region and the first semiconductor region, and is spaced apart from the fifth semiconductor region, wherein the first semiconductor device is a first transistor device, wherein the first semiconductor region forms a drain region of the first transistor device, and wherein the fifth semiconductor region forms a source region of the first transistor device. ### Claim 15 (depends on 14) The semiconductor device of claim 14, further comprising a second transistor device at least partly integrated in a second section of the third semiconductor layer, wherein the second section is spaced apart from the first region. ### Claim 16 (depends on 15) The semiconductor device of claim 15, wherein the second transistor device comprises: a second source region of the first doping type; a second drain region of the first doping type spaced apart from the second source region; a body region of the second doping type adjoining the second source region and arranged between the second source region and the second drain region; and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. ### Claim 17 A semiconductor device, comprising: a layer stack with a plurality of first semiconductor layers of a first doping type and a plurality of second semiconductor layers of a second doping type complementary to the first doping type; a first semiconductor region of a first semiconductor device adjoining the plurality of first semiconductor layers; at least one second semiconductor region of the first semiconductor device, wherein each of the at least one second semiconductor region adjoins at least one of the plurality of second semiconductor layers, and is spaced apart from the first semiconductor region; and a third semiconductor layer adjoining the layer stack and each of the first semiconductor region, and the at least one second semiconductor regions, wherein each of the plurality of first semiconductor layers has a first thickness in a vertical direction that is perpendicular to the first direction, wherein each of the plurality of second semiconductor layers has a second thickness in the vertical direction, wherein the third semiconductor layer has a thickness in the vertical direction that is at least twice the sum of the first thickness and the second thickness, wherein the first semiconductor device is a transistor device and the at least one second semiconductor region is a gate region of the transistor device, or the first semiconductor device is a diode device and the at least one second semiconductor region forms an anode of the diode device. ### Claim 18 (depends on 1) The semiconductor device of claim 1, wherein the first semiconductor region is a drain region of the transistor device or forms a cathode of the diode device.