# US 11,309,430 B2 · Semiconductor device and method for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,430 B2 - Document ID: US11309430B2 - Status: Granted - Kind: B2 - Application number: 16/905,999 - Filed: 2020-06-19 - Published: 2020-10-08 - Granted: 2022-04-19 - Earliest claimed: 2009-03-06 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Junichiro Sakata; Takuya Hirohashi; Hideyuki Kishida - Web page: https://patentgrep.com/patent/US11309430B2 ## CPC - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device} - H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes} - H10D 30/6729: {characterised by the electrodes} - H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D 30/6739: {Conductor-insulator-semiconductor electrodes} - H10D 30/6756: {Amorphous oxide semiconductors} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)} - H10D 62/235: {of IGFETs (IGFETs having buried channels H10D30/637)} - H10D 62/80: characterised by the materials - H10D 64/512: {Disposition of the gate electrodes, e.g. buried gates} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10D 99/00: Subject matter not provided for in other groups of this subclass - H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering - H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)} - H10P 14/3426: {Oxides} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer. ## Claims ### Claim 1 A semiconductor device comprising: a gate electrode over a substrate; a gate insulating layer over the gate electrode; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer comprising a first region and a second region; a source electrode electrically connected to the second oxide semiconductor layer; a drain electrode electrically connected to the second oxide semiconductor layer; and an insulating film over and in contact with the source electrode, the drain electrode, and the second oxide semiconductor layer, wherein the first oxide semiconductor layer comprises indium, tin, and zinc, wherein the second oxide semiconductor layer comprises indium, gallium, and zinc, wherein the first region and one of the source electrode and the drain electrode overlap each other, wherein the second region is in contact with the insulating film, wherein a composition ratio of the first region is different from a composition ratio of the second region, wherein each of the source electrode and the drain electrode comprises at least one of titanium, aluminum, manganese, magnesium, zirconium, beryllium, thorium, and copper, and wherein each of the source electrode and the drain electrode is in contact with the gate insulating layer. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first oxide semiconductor layer has a thickness of 5 nm to 200 nm. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein each of the source electrode and the drain electrode overlap with the gate electrode. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the one of the source electrode and the drain electrode covers a side surface of the second oxide semiconductor layer. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the second oxide semiconductor layer comprises a depressed portion between the source electrode and the drain electrode. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, wherein the first region comprises a metal oxide. ### Claim 8 (depends on 1) A display module comprising the semiconductor device according to claim 1, wherein the display module comprises an FPC. ### Claim 9 (depends on 1) An electronic apparatus comprising the semiconductor device according to claim 1, wherein the electronic apparatus comprises at least one of a speaker, a battery, and an operation key. ### Claim 10 A semiconductor device comprising: a gate electrode over a substrate; a gate insulating layer over the gate electrode; a first oxide semiconductor layer over the gate insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer, the second oxide semiconductor layer comprising a first region and a second region; a source electrode electrically connected to the second oxide semiconductor layer; a drain electrode electrically connected to the second oxide semiconductor layer; and an insulating film over and in contact with the source electrode, the drain electrode, and the second oxide semiconductor layer, wherein the first oxide semiconductor layer comprises tin, gallium, and zinc, wherein the second oxide semiconductor layer comprises indium, gallium, and zinc, wherein the first region and one of the source electrode and the drain electrode overlap each other, wherein the second region is in contact with the insulating film, wherein a composition ratio of the first region is different from a composition ratio of the second region, wherein each of the source electrode and the drain electrode comprises at least one of titanium, aluminum, manganese, magnesium, zirconium, beryllium, thorium, and copper, and wherein each of the source electrode and the drain electrode is in contact with the gate insulating layer. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, wherein the first oxide semiconductor layer has a thickness of 5 nm to 200 nm. ### Claim 12 (depends on 10) The semiconductor device according to claim 10, wherein each of the source electrode and the drain electrode overlap with the gate electrode. ### Claim 13 (depends on 10) The semiconductor device according to claim 10, wherein a thickness of the first oxide semiconductor layer is larger than a thickness of the second oxide semiconductor layer. ### Claim 14 (depends on 10) The semiconductor device according to claim 10, wherein the one of the source electrode and the drain electrode covers a side surface of the second oxide semiconductor layer. ### Claim 15 (depends on 10) The semiconductor device according to claim 10, wherein the second oxide semiconductor layer comprises a depressed portion between the source electrode and the drain electrode. ### Claim 16 (depends on 10) The semiconductor device according to claim 10, wherein the first region comprises a metal oxide. ### Claim 17 (depends on 10) A display module comprising the semiconductor device according to claim 10, wherein the display module comprises an FPC. ### Claim 18 (depends on 10) An electronic apparatus comprising the semiconductor device according to claim 10, wherein the electronic apparatus comprises at least one of a speaker, a battery, and an operation key.