# US 11,309,408 B2 · Aspect ratio trapping in channel last process

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- Number: US 11,309,408 B2
- Document ID: US11309408B2
- Status: Granted
- Kind: B2
- Application number: 16/216,077
- Filed: 2018-12-11
- Published: 2019-04-25
- Granted: 2022-04-19
- Earliest claimed: 2016-06-15
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Effendi Leobandung; Chun-chen Yeh
- Web page: https://patentgrep.com/patent/US11309408B2

## CPC

- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 30/6212: {having fin-shaped semiconductor bodies having non-rectangular cross-sections}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/53: the imperfections being within the semiconductor body
- H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D 62/85: being Group III-V materials, e.g. GaAs
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/2924: {Structures}
- H10P 14/3242: {Structure}
- H10P 14/3418: {Phosphides}
- H10P 14/3421: {Arsenides}
- H10P 50/282: {of inorganic materials}
- H10P 50/642: {Chemical etching}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of forming the fin structure that includes forming a replacement gate structure on a channel region of the at least one replacement fin structure; and forming an encapsulating dielectric encapsulating the replacement fin structure leaving a portion of the replacement gate structure exposed. The exposed portion of the replacement gate structure is etched to provide an opening through the encapsulating dielectric to the replacement fin structure. The replacement fin structure is etched selectively to the dielectric to provide a fin opening having a geometry dictated by the encapsulating dielectric. Functional fin structures of a second semiconductor material is epitaxially grown on the growth surface of the substrate substantially filling the fin opening.

## Claims

### Claim 1

A semiconductor device comprising:
a substrate of a type IV semiconductor material having a trench present therein;
a plurality of type III-V fin structures joined by an epitaxial base portion that is present encapsulated at its sidewall surfaces and base surface within the trench of the type IV semiconductor material, the epitaxial base portion that is present in the trench has a greater width than a width of a fin structure in the plurality of type III-V fin structures, the plurality of type III-V fin structures and the epitaxial base portion being composed of a same composition material, wherein the epitaxial base portion in epitaxial relationship with the trench of the type IV semiconductor substrate;
a gate structure present on a channel region portion of the type III-V fin structures; and
source and drain regions present on source and drain region portions of the type III-V fin structures.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein type IV semiconductor is selected from the group consisting of silicon (Si), germanium (Ge), silicon germanium (SiGe) and combinations thereof.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the III-V fin structures are of indium phosphide (InP).

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the type III-V fin structures are of indium gallium arsenic (InGaAs).

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the type III-V fin structures have a body portion with a defect density that ranges from 0 defects/cm2 to 1×1010 defects/cm2.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the type III-V fin structures have a substrate trench portion with a defect density that ranges from 1 defects/cm2 to 1×1011 defects/cm2.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the plurality of the type III-V fin structures joined by the epitaxial base portion that is present within the trench of the type IV semiconductor material includes a single epitaxial base portion extending into direct contact with each of the fin structure in the plurality of type III-V fin structures.

### Claim 8

A semiconductor device comprising:
a substrate having a trench present therein, wherein dimensions of the trench provide for aspect ratio trapping of defects;
a plurality of type III-V fin structures joined by an epitaxial base portion that is present within the trench, the epitaxial base portion that is present encapsulated at its sidewall surfaces and base surface in the trench has a greater width than a width of a fin structure in the plurality of type III-V fin structures, wherein the epitaxial base portion in epitaxial relationship with the trench, the plurality of type III-V fin structures and the epitaxial base portion being composed of a same composition material;
a gate structure present on a channel region portion of the type III-V fin structures; and
source and drain regions present on source and drain region portions of the type III-V fin structures.

### Claim 9 (depends on 8)

The semiconductor device of claim 8, wherein the III-V fin structures are of indium phosphide (InP).

### Claim 10 (depends on 8)

The semiconductor device of claim 8, wherein the type III-V fin structures are of indium gallium arsenic (InGaAs).

### Claim 11 (depends on 8)

The semiconductor device of claim 8, wherein the second semiconductor material is a type III-V semiconductor material of indium gallium arsenic (InGaAs) and combinations thereof.

### Claim 12 (depends on 8)

The semiconductor device of claim 8, wherein the type III-V fin structures have a body portion with a defect density that ranges from 0 defects/cm2 to 1×1010 defects/cm2.

### Claim 13 (depends on 8)

The semiconductor device of claim 8, wherein the type III-V fin structures have a substrate trench portion with a defect density that ranges from 1 defects/cm2 to 1×1011 defects/cm2.

### Claim 14 (depends on 8)

The semiconductor device of claim 8, wherein the plurality of the type III-V fin structures joined by the epitaxial base portion that is present within the trench of the type IV semiconductor material includes a single epitaxial base portion extending into direct contact with each of the fin structure in the plurality of type III-V fin structures.

### Claim 15

A device comprising:
a substrate having a trench present therein, wherein dimensions of the trench provide for aspect ratio trapping of defects; and
a plurality of type III-V fin structures joined by an epitaxial base portion that is present within the trench, wherein the epitaxial base portion in epitaxial relationship with the trench, the plurality of type III-V fin structures and the epitaxial base portion being composed of a same composition material, wherein the epitaxial base portion that is present encapsulated at its sidewall surfaces and base surface in the trench has a greater width than a width of a fin structure in the plurality of type III-V fin structures.

### Claim 16 (depends on 15)

The device of claim 15, wherein the substrate is a type IV semiconductor selected from the group consisting of silicon (Si), germanium (Ge), silicon germanium (SiGe) and combinations thereof.

### Claim 17 (depends on 15)

The device of claim 15, wherein the III-V fin structures are of indium phosphide (InP).

### Claim 18 (depends on 15)

The device of claim 15, wherein the type III-V fin structures are of indium gallium arsenic (InGaAs).

### Claim 19 (depends on 15)

The device of claim 15, wherein the type III-V fin structures have a body portion with a defect density that ranges from 0 defects/cm2 to 1×1010 defects/cm2.

### Claim 20 (depends on 15)

The semiconductor device of claim 15, wherein the type III-V fin structures have a substrate trench portion with a defect density that ranges from 1 defects/cm2 to 1×1011 defects/cm2.