# US 11,309,388 B2 · Multi-super lattice for switchable arrays

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- Number: US 11,309,388 B2
- Document ID: US11309388B2
- Status: Granted
- Kind: B2
- Application number: 16/995,563
- Filed: 2020-08-17
- Published: 2020-12-03
- Granted: 2022-04-19
- Earliest claimed: 2018-12-21
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Benjamin Stassen Cook; Luigi Colombo; Nazila Dadvand; Archana Venugopal
- Web page: https://patentgrep.com/patent/US11309388B2

## CPC

- H10D 62/8161: {potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices (lateral superlattices, lateral surface superlattices H10D62/8181)}
- H10D 30/014: {of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron transistors [SET] or Coulomb blockade transistors}
- H10D 30/43: having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
- H10D 30/83: FETs having PN junction gate electrodes
- H10D 62/121: {oriented parallel to substrates}
- H10D 62/882: {Graphene}
- H10D 64/411: {for FETs}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- B82Y 40/00: Manufacture or treatment of nanostructures
- H10D 30/01: Manufacture or treatment
- H10D 62/8303: {Diamond}
- H10D 84/02: characterised by using material-based technologies
- H10D 84/87: of PN-junction gate FETs
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

A switchable array includes: a microstructure of interconnected units formed of graphene tubes with open spaces in the microstructure bounded by the graphene tubes; at least one JFET gate in at least one of the graphene tubes; and a control line having an end connected to the at least one JFET gate. The control line extends to a periphery of the microstructure.

## Claims

### Claim 1

A switchable array comprising:
a microstructure of interconnected units formed of graphene tubes with open spaces in the microstructure bounded by the graphene tubes;
at least one field-effect transistor (FET) gate in at least one of the graphene tubes; and
a control line having an end connected to the at least one FET gate, the control line extending to a periphery of the microstructure.

### Claim 2 (depends on 1)

The switchable array of claim 1, wherein the graphene tubes are arranged in an ordered structure and form symmetric patterns that repeat along principal directions of three-dimensional space.

### Claim 3 (depends on 1)

The switchable array of claim 1, wherein the graphene tubes form a rigid structure.

### Claim 4 (depends on 1)

The switchable array of claim 1, wherein the microstructure forms a micro-lattice.

### Claim 5 (depends on 1)

The switchable array of claim 1, wherein the graphene tubes are hollow.

### Claim 6 (depends on 1)

The switchable array of claim 1, wherein the graphene tubes are interconnected by chemical electronic bonds.

### Claim 7 (depends on 1)

The switchable array of claim 1, wherein the control line passes through at least one open space bounded by the microstructure.

### Claim 8 (depends on 7)

The switchable array of claim 7, wherein the control line passes through open spaces bounded by the microstructure.

### Claim 9 (depends on 1)

The switchable array of claim 1, wherein the control line comprises a polymer plated with an electrically conductive metal.