# US 11,309,341 B2 · Display panel and method of fabricating same

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- Number: US 11,309,341 B2
- Document ID: US11309341B2
- Status: Granted
- Kind: B2
- Application number: 16/625,722
- Filed: 2019-11-06
- Published: 2022-01-06
- Granted: 2022-04-19
- Earliest claimed: 2019-09-05
- Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Inventors: Hui Xiao
- Web page: https://patentgrep.com/patent/US11309341B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 86/021: {of multiple TFTs}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/126: Shielding, e.g. light-blocking means over the TFTs
- H10D 30/6723: {having light shields}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10H 29/142: {Two-dimensional arrangements, e.g. asymmetric LED layout}
- H10K 59/1201: {Manufacture or treatment}
- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10P 32/14: within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
- H10P 32/17: {characterised by the semiconductor material}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A display panel and a method of fabricating the same are provided. The display panel has a substrate, an active layer disposed on the substrate, a gate insulating layer and a gate metal layer stacking-disposed on the active layer, wherein the active layer has an active island, the active island has a conductor layer and a semiconductor layer aligned with and in contact with the gate insulating layer, and the conductor layer is provided with a protective layer.

## Claims

### Claim 1

A display panel, comprising:
a substrate;
a light shielding layer disposed on the substrate;
a buffer layer disposed on the substrate and covering the light shielding layer;
an active layer disposed on the buffer layer;
a gate insulating layer and a gate metal layer stacking-disposed on the active layer;
an interlayer dielectric layer disposed on the buffer layer and covering the gate metal layer;
a second metal layer disposed on the interlayer dielectric layer, wherein the second metal layer comprises a source/drain metal layer;
a passivation layer and a flat layer stacking-disposed on the interlayer dielectric layer;
an anode metal layer, a light emitting layer, and a cathode metal layer stacking-disposed on the flat layer;
wherein the flat layer is further provided with a pixel defining layer, the pixel defining layer is provided with a pixel opening, and the light emitting layer is located in the pixel opening; and wherein the active layer comprises an active island comprising a conductor layer and a semiconductor layer aligned with and in contact with the gate insulating layer, the conductor layer is provided with a protective layer, and the source/drain metal layer passes through the protective layer to contact and connect with the conductor layer, and
wherein the light shielding layer comprises a first metal electrode plate, the active layer further comprises a dielectric layer independent of the active island, the dielectric layer has a position aligned with the first metal electrode plate, and the second metal layer further comprises a second metal electrode plate disposed on the dielectric layer and independent of the source/drain metal layer.

### Claim 2 (depends on 1)

The display panel according to claim 1, wherein the gate metal layer is provided with a protective layer covering the gate metal layer.

### Claim 3 (depends on 1)

The display panel according to claim 1, wherein the dielectric layer is further provided with a protective layer covering the dielectric layer.

### Claim 4 (depends on 1)

The display panel according to claim 1, wherein the interlayer dielectric layer is defined with an opening, wherein the second metal electrode plate is located in the opening.

### Claim 5 (depends on 1)

The display panel according to claim 1, wherein the protective layer is an aluminum oxide protective layer.

### Claim 6

A display panel, comprising:
a substrate;
a light shielding layer disposed on the substrate;
a buffer layer disposed on the substrate and covering the light shielding layer;
an active layer disposed on the buffer layer;
a gate insulating layer and a gate metal layer stacking-disposed on the active layer;
an interlayer dielectric layer disposed on the buffer layer and covering the gate metal layer;
a second metal layer disposed on the interlayer dielectric layer, wherein the second metal layer comprises a source/drain metal layer;
a passivation layer and a flat layer stacking-disposed on the interlayer dielectric layer;
an anode metal layer, a light emitting layer, and a cathode metal layer stacking-disposed on the flat layer;
wherein the active layer comprises an active island comprising a conductor layer and a semiconductor layer aligned with and in contact with the gate insulating layer, the conductor layer is provided with a protective layer, and the source/drain metal layer passes through the protective layer to contact and connect with the conductor layer; and
wherein the light shielding layer comprises a first metal electrode plate, the active layer further comprises a dielectric layer independent of the active island, the dielectric layer has a position aligned with the first metal electrode plate, and the second metal layer further comprises a second metal electrode plate disposed on the dielectric layer and independent of the source/drain metal layer.

### Claim 7 (depends on 6)

The display panel according to claim 6, wherein the gate metal layer is provided with a protective layer covering the gate metal layer.

### Claim 8 (depends on 6)

The display panel according to claim 6, wherein the dielectric layer is further provided with a protective layer covering the dielectric layer.

### Claim 9 (depends on 6)

The display panel according to claim 6, wherein the interlayer dielectric layer is defined with an opening, wherein the second metal electrode plate is located in the opening.

### Claim 10 (depends on 6)

The display panel according to claim 6, wherein the protective layer is an aluminum oxide protective layer.

### Claim 11

A method of fabricating a display panel, comprising:
a step S10 of forming a light shielding layer on a substrate and a buffer layer covering the light shielding layer, wherein the light shielding layer comprises a first metal electrode plate;
a step S20 of forming a patterned active layer on the buffer layer, wherein the active layer comprises an active island and a dielectric layer independent of the active island, and a position of the dielectric layer is aligned with a position of the first metal electrode plate;
a step S30 of sequentially forming a gate insulating layer and a gate metal layer in stack on the active island;
a step S40 of conductorizing a portion of the active island exposed by the gate insulating layer to form a conductor layer, and forming a protective layer covering the conductor layer;
a step S50 of forming an interlayer dielectric layer covering the active layer and the gate metal layer;
a step S60 of forming a second metal layer on the interlayer dielectric layer and the dielectric layer, and patterning the second metal layer to form a source/drain metal layer in contact with and in connection with the conductor layer and a second metal electrode plate independent of the source/drain metal layer, wherein the second metal electrode plate is disposed on the dielectric layer to form a storage capacitor with the first metal electrode plate;
a step S70 of forming a passivation layer and a flat layer in stack on the interlayer dielectric layer; and
a step S80 of sequentially forming an anode metal layer, a light emitting layer, and a cathode metal layer in stack on the flat layer.

### Claim 12 (depends on 11)

The method of fabricating the display panel according to claim 11, wherein the step S40 comprises:
a step S41 of forming a thin film from aluminum or/and aluminum oxide on the portion of the active island exposed by the gate insulating layer; and
a step S42 of thermally annealing the thin film in an environment with oxygen, diffusing aluminum molecules into the portion of the active island exposed by the gate insulating layer, such that the portion of the active island exposed by the gate insulating layer forms the conductor layer, while oxygen atoms in the active island diffuse into the thin film to form the protective layer on the conductor layer, wherein the protective layer is an aluminum oxide protective layer.

### Claim 13 (depends on 12)

The method of fabricating the display panel according to claim 12, wherein a protective layer is also formed on the gate metal layer and the dielectric layer while forming the protective layer on the conductor layer.

### Claim 14 (depends on 13)

The method of fabricating the display panel according to claim 13, wherein the step S60 comprises:
a step S61 of forming an opening in a position of the interlayer dielectric layer aligned with the first metal electrode plate to expose the dielectric layer;
a step S62 of forming a second metal layer on the interlayer dielectric layer and the dielectric layer; and
a step S63 of performing a patterning treatment on the second metal layer to form a source/drain metal layer in contact with and in connection with the conductor layer and a second metal electrode plate independent of the source/drain metal layer, wherein the second metal electrode plate is disposed on the dielectric layer to form the storage capacitor with the first metal electrode plate.