# US 11,309,321 B2 · Integrated structures containing vertically-stacked memory cells

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,309,321 B2
- Document ID: US11309321B2
- Status: Granted
- Kind: B2
- Application number: 17/107,814
- Filed: 2020-11-30
- Published: 2021-03-18
- Granted: 2022-04-19
- Earliest claimed: 2015-08-17
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Haitao Liu; Chandra Mouli; Sergei Koveshnikov; Dimitrios Pavlopoulos; Guangyu Huang
- Web page: https://patentgrep.com/patent/US11309321B2

## CPC

- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10D 64/035: {comprising conductor-insulator-conductor-insulator-semiconductor structures}
- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10D 64/037: {comprising charge-trapping insulators}
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Some embodiments include an integrated structure having a stack of alternating dielectric levels and conductive levels, and having vertically-stacked memory cells within the conductive levels. An opening extends through the stack. Channel material is within the opening and along the memory cells. At least some of the channel material contains germanium.

## Claims

### Claim 1

An integrated structure comprising:
a stack of alternating dielectric levels comprising a dielectric material and conductive levels that comprise a conductive material that physically contacts the dielectric material;
vertically-stacked memory cells within the conductive levels, each of the vertically stacked memory cells comprising a charge trapping region, the dielectric material of the dielectric levels extending over and beneath the charge trapping region across an entirety of a width of the charge trapping region;
an opening extending through the stack, the opening having a sidewall extending vertically continuously from top to bottom of the opening; and
a first channel material liner within the opening and along the memory cells and directly against the dielectric material of the dielectric levels, the first channel material liner comprising tin oxide having a thickness of from one monolayer to 60 Angstroms; and
a second channel material comprising germanium within the opening and spaced from the sidewall by the first channel material.

### Claim 2 (depends on 1)

The integrated structure of claim 1 wherein an entirety of the second channel material comprises Si(1-x)Gex; where x is a number greater than zero, and less than or equal to 1.

### Claim 3 (depends on 1)

The integrated structure of claim 1 wherein the second channel material comprises a concentration of germanium within a range of from about 10 atomic percent to about 30 atomic percent.

### Claim 4 (depends on 1)

The integrated structure of claim 1 wherein the second channel material comprises a horizontally-extending gradient of germanium concentration.

### Claim 5 (depends on 4)

The integrated structure of claim 4 wherein the second channel material has an exterior surface along the first channel material and an interior region horizontally offset from the exterior surface, and wherein the germanium concentration increases along a direction from the exterior surface toward the interior region.

### Claim 6 (depends on 4)

The integrated structure of claim 4 wherein the second channel material has an exterior surface along the first channel material and an interior region horizontally offset from the exterior surface, and wherein the germanium concentration decreases along a direction from the exterior surface toward the interior region.

### Claim 7 (depends on 1)

The integrated structure of claim 1 wherein the first and second channel materials completely fill the opening.

### Claim 8 (depends on 1)

The integrated structure of claim 1 wherein the first and second channel materials line the sidewalls of the opening to leave a hollow within the opening.

### Claim 9 (depends on 1)

The integrated structure of claim 1 further comprising gate oxide disposed entirely within the conductive levels.