# US 11,309,304 B2 · Stackable electronic package and method of fabricating same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,309,304 B2
- Document ID: US11309304B2
- Status: Granted
- Kind: B2
- Application number: 15/956,231
- Filed: 2018-04-18
- Published: 2018-08-23
- Granted: 2022-04-19
- Earliest claimed: 2009-03-24
- Assignees: General Electric Company
- Applicants: General Electric Company
- Inventors: James Sabatini; Christopher James Kapusta; Glenn Forman
- Web page: https://patentgrep.com/patent/US11309304B2

## CPC

- H10W 90/00: Package configurations
- H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/614: {the multiple chips being integrally enclosed}
- H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs}
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/63: Vias, e.g. via plugs
- H10W 72/073: {of die-attach connectors}
- H10W 72/874: {On different surfaces}
- H10W 72/9413: {on encapsulations}
- H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body}
- H10W 90/10: Configurations of laterally-adjacent chips
- H10W 90/20: Configurations of stacked chips
- H10W 90/721: {of bump connectors}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween.

## Claims

### Claim 1

A layer of a multi-layer electronic package, the layer comprising:
an electronic component comprising an active surface that includes first and second contact pads thereon;
a dielectric material having a first surface coupled to the active surface of the electronic component, the dielectric material including a plurality of vias therethrough;
an electrically conductive material having a first surface coupled to the first surface of the dielectric material;
metallization paths disposed on a second surface of the dielectric material and through the plurality of vias, each of the metallization paths electrically connecting a respective part of the electrically conductive material to a respective one of the first and second contact pads; and
feed-thru pads electrically coupled to the metallization paths.

### Claim 2 (depends on 1)

The layer of claim 1 wherein a surface of the electronic component opposite the active surface and a surface of the electrically conductive material opposite the first surface thereof form portions of a bottom surface of the layer, and wherein the feed-thru pads form a portion of a top surface of the layer.

### Claim 3 (depends on 1)

The layer of claim 1 further comprising an encapsulant positioned about the electronic component and the electrically conductive material.

### Claim 4 (depends on 1)

The layer of claim 1 wherein the feed-thru pads comprise multi-layer structures.

### Claim 5 (depends on 1)

The layer of claim 1 further comprising a mask layer applied to a second surface of the dielectric material and surrounding side surfaces of the feed-thru pads.
