# US 11,309,264 B2 · Semiconductor device package > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,264 B2 - Document ID: US11309264B2 - Status: Granted - Kind: B2 - Application number: 16/833,330 - Filed: 2020-03-27 - Published: 2021-09-30 - Granted: 2022-04-19 - Earliest claimed: 2020-03-27 - Assignees: Advanced Semiconductor Engineering, Inc. - Applicants: Advanced Semiconductor Engineering, Inc. - Inventors: Wen Hung Huang - Web page: https://patentgrep.com/patent/US11309264B2 ## CPC - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package} - H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)} - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - H10W 70/65: Shapes or dispositions of interconnections - H10W 70/685: comprising multiple insulating layers - H10W 74/016: {using moulds} - H10W 74/114: {by a substrate and the encapsulations} - H10W 44/248: {for antennas} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72) ## Abstract The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE. ## Claims ### Claim 1 A semiconductor device package, comprising: an antenna layer having a first coefficient of thermal expansion (CTE); a first circuit layer disposed over the antenna layer, the first circuit layer having a second CTE; and a second circuit layer disposed over the antenna layer, the second circuit layer having a third CTE, wherein a difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE. ### Claim 2 (depends on 1) The semiconductor device package of claim 1, wherein the first circuit layer is disposed adjacent to the second circuit layer, and the first circuit layer and the second circuit layer are disposed at the same altitude with respect to the antenna layer. ### Claim 3 (depends on 2) The semiconductor device package of claim 2, wherein the first circuit layer surrounds the second circuit layer. ### Claim 4 (depends on 1) The semiconductor device package of claim 1, wherein the first circuit layer is in contact with the second circuit layer. ### Claim 5 (depends on 1) The semiconductor device package of claim 1, further comprising a package body covering the first circuit layer and the second circuit layer. ### Claim 6 (depends on 5) The semiconductor device package of claim 5, wherein the package body further extends between the first circuit layer and the second layer. ### Claim 7 (depends on 1) The semiconductor device package of claim 1, further comprising a substrate having a first surface and a second surface opposite to the first surface, wherein the first circuit layer and the second circuit layer are disposed on the first surface of the substrate, the antenna layer is disposed on the second surface of the substrate, and the antenna layer and at least a portion of the substrate define an antenna region. ### Claim 8 (depends on 7) The semiconductor device package of claim 7, wherein the substrate comprises: a first conductive layer disposed on the first surface of the substrate; a second conductive layer disposed on the second surface of the substrate; and a feeding via penetrating the substrate and electrically connecting the first conductive layer with the second conductive layer. ### Claim 9 (depends on 8) The semiconductor device package of claim 8, wherein the first circuit layer comprises: a third conductive layer; a first dielectric layer at least partially covering the third conductive layer; and a first through via penetrating the first dielectric layer and the first levelling layer to be electrically connected to the first conductive layer. ### Claim 10 (depends on 9) The semiconductor device package of claim 9, further comprising a first levelling layer disposed on the first surface of the substrate and covering the first conductive layer. ### Claim 11 (depends on 10) The semiconductor device package of claim 10, further comprising a first adhesive layer connecting the first circuit layer to the first levelling layer, wherein the first through via further penetrates the first adhesive layer. ### Claim 12 (depends on 10) The semiconductor device package of claim 10, wherein the second circuit layer comprises: a fourth conductive layer; a second dielectric layer at least partially covering the fourth conductive layer; and a second through via penetrating the second dielectric layer and the first levelling layer to be electrically connected to the first conductive layer. ### Claim 13 A semiconductor device package, comprising: a substrate having a first surface and a second surface opposite to the first surface; a first circuit layer disposed on the first surface of the substrate, the first circuit layer having a first conductive layer and a first dielectric layer at least partially covering the first conductive layer; and a second circuit layer disposed on the first surface of the substrate, the second circuit layer having a second conductive layer and a second dielectric layer at least partially covering the second conductive layer, wherein a dielectric constant (Dk) of the first dielectric layer is less than a Dk of the second dielectric layer. ### Claim 14 (depends on 13) The semiconductor device package of claim 13, wherein the first circuit layer is disposed adjacent to the second circuit layer, and the first circuit layer and the second circuit layer are disposed at the same altitude with respect to the substrate. ### Claim 15 (depends on 13) The semiconductor device package of claim 13, further comprising a package body disposed on the first surface of the substrate and covering the first circuit layer and the second circuit layer. ### Claim 16 (depends on 15) The semiconductor device package of claim 15, wherein the package body further extends between the first circuit layer and the second layer. ### Claim 17 (depends on 13) The semiconductor device package of claim 13, further comprising an antenna layer disposed on the second surface of the substrate, wherein the antenna layer further comprises an antenna pattern and a third dielectric layer at least partially covering the antenna pattern. ### Claim 18 (depends on 17) The semiconductor device package of claim 17, wherein the Dk of the first dielectric layer is substantially the same as a Dk of the third dielectric layer. ### Claim 19 (depends on 13) The semiconductor device package of claim 13, wherein the substrate comprises a conductive layer disposed on the first surface of the substrate and electrically connecting the first circuit layer with the second circuit layer. ### Claim 20 (depends on 13) The semiconductor device package of claim 13, wherein the substrate further comprises: a third conductive layer disposed on the first surface of the substrate; a fourth conductive layer disposed on the second surface of the substrate; a conductive via penetrating the substrate and electrically connecting the third conductive layer with the fourth conductive layer; and a levelling layer disposed on the first surface of the substrate and covering the third conductive layer.