# US 11,309,184 B2 · Semiconductor structure and formation method thereof

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- Number: US 11,309,184 B2
- Document ID: US11309184B2
- Status: Granted
- Kind: B2
- Application number: 16/863,289
- Filed: 2020-04-30
- Published: 2021-06-03
- Granted: 2022-04-19
- Earliest claimed: 2019-11-29
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Inventors: Wang Wei; Su Bo; Sun Linlin; He Qiyang
- Web page: https://patentgrep.com/patent/US11309184B2

## CPC

- H10P 50/73: {using masks for insulating materials}
- H10P 76/4088: {Processes for improving the resolution of the masks}
- H10P 76/405: {characterised by their composition, e.g. multilayer masks}
- H10P 76/4083: {characterised by their behaviours during the lithography processes, e.g. soluble masks or redeposited masks}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning}
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor structure and a formation method thereof are disclosed. The formation method includes: providing a base, wherein a first mandrel layer and a first mask layer located on the first mandrel layer are formed on the base, and openings exposing the first mandrel layer are formed in the first mask layer; forming a second mandrel layer covering the first mask layer, wherein the second mandrel layer also fills the openings; forming first trenches running through the second mandrel layer, the first mask layer and the first mandrel layer, wherein the side walls of the first trenches expose the second mandrel layer in the openings; forming side wall layers on the side walls of the first trenches; and etching to remove the second mandrel layer and the first mandrel layer below the positions of the openings by taking the side wall layers as masks to form second trenches running through the first mandrel layer, wherein the second trenches and the first trenches are isolated by the side wall layers. The present disclosure enlarges a process window for forming the second trenches under the protective effect of the first mask layer.

## Claims

### Claim 1

A formation method of a semiconductor structure, comprising:
providing a base, wherein a first mandrel layer and a first mask layer located on the first mandrel layer are formed on the base, and openings exposing the first mandrel layer are formed in the first mask layer;
forming a second mandrel layer covering the first mask layer, wherein the second mandrel layer also fills the openings;
forming first trenches running through the second mandrel layer, the first mask layer and the first mandrel layer, wherein the side walls of the first trenches expose the second mandrel layer in the openings; forming side wall layers on the side walls of the first trenches; and
etching to remove the second mandrel layer and the first mandrel layer below the openings by taking the side wall layers as masks to form second trenches running through the first mandrel layer, wherein the second trenches and the first trenches are isolated by the side wall layers.

### Claim 2 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein:
a second mask layer and a third mask layer located on the second mask layer are further formed between the base and the first mandrel layer, and the etching resistance of the second mask layer is greater than that of the third mask layer; and
after forming the second trenches, the formation method of the semiconductor structure further comprises:
etching the third mask layer at bottom portions of the first trenches and the second trenches by taking the side wall layers and the first mandrel layer as masks to form first mask openings in the third mask layer; after forming the first mask openings, removing the side wall layers and the first mandrel layer; and
after removing the side wall layers and the first mandrel layer, etching the second mask layer at bottom portions of the first mask openings by taking the third mask layer as a mask to form second mask openings in the second mask layer.

### Claim 3 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein a step of forming the openings exposing the first mandrel layer in the first mask layer comprises:
forming a first pattern layer on the first mask layer, wherein first grooves are formed in the first pattern layer; etching the first mask layer along the first grooves by taking the first pattern layer as a mask; and
removing the first pattern layer.

### Claim 4 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein:
an extending direction of each opening of the openings is a first direction, and a direction perpendicular to the first direction is a second direction;
the step of forming the first trenches comprises: forming a second pattern layer on the second mandrel layer, wherein second grooves are formed in the second pattern layer, the second grooves extend in the first direction, and in the second direction, and projections of the second grooves and projections of the openings on the base are adjacent to each other or partially overlap each other;
etching the second mandrel layer, the first mask layer and the first mandrel layer in sequence along the second grooves by taking the second pattern layer as a mask; and
removing the second pattern layer.

### Claim 5 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein:
a material of the first mandrel layer is amorphous silicon or amorphous carbon;
a material of the second mandrel layer is amorphous silicon or amorphous carbon; and
a material of the first mask layer is silicon oxide, silicon nitride, silicon oxynitride, or silicon carbonitride.

### Claim 6 (depends on 2)

The formation method of the semiconductor structure according to claim 2, wherein the materials of the first mask layer and the third mask layer are the same.

### Claim 7 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein in a step of forming the first mask layer, the thickness of the first mask layer is 100 Å to 1000 Å.

### Claim 8 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein the first mask layer is etched using a dry etching process to form the openings.

### Claim 9 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein the second mandrel layer, the first mask layer, and the first mandrel layer are etched using a dry etching process to form the first trenches.

### Claim 10 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein the second mandrel layer and the first mandrel layer below the positions of the openings are etched to be removed using a wet etching process.

### Claim 11 (depends on 1)

The formation method of the semiconductor structure according to claim 1, wherein the second mandrel layer is formed using a chemical vapor deposition process.

### Claim 12 (depends on 2)

The formation method of the semiconductor structure according to claim 2, wherein:
the base comprises a substrate and a dielectric layer located on the substrate; and the formation method further comprises:
etching the dielectric layer at the bottom portions of the first trenches and the second trenches to form interconnection openings in the dielectric layer; and
filling the interconnection openings to form interconnection structures.