# US 11,309,152 B2 · Temperature-based control of inductor demagnetization > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,152 B2 - Document ID: US11309152B2 - Status: Granted - Kind: B2 - Application number: 15/608,071 - Filed: 2017-05-30 - Published: 2017-09-28 - Granted: 2022-04-19 - Earliest claimed: 2013-09-20 - Assignees: Maxim Integrated Products, Inc. - Applicants: Maxim Integrated Products, Inc. - Inventors: Siro Buzzetti; Marco Demicheli; Danilo Ranieri - Web page: https://patentgrep.com/patent/US11309152B2 ## CPC - H01H 47/22: for supplying energising current for relay coil - H01F 13/006: {Methods and devices for demagnetising of magnetic bodies, e.g. workpieces, sheet material (for erasing of information on magnetic record carriers G11B5/00)} - H01H: ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES (contact cables H01B7/10; electrolytic self-interrupters H01G9/18; emergency protective circuit arrangements H02H; switching by electronic means without contact-making H03K17/00) - H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES ## Abstract An integrated circuit for demagnetizing an inductive load includes a first switch to control current supplied by a voltage supply to the inductive load. A Zener diode includes an anode connected to a control terminal of the first switch and a cathode connected to the voltage supply. A second switch includes a control terminal and first and second terminals. A temperature sensing circuit is configured to sense a temperature of the first switch and to generate a sensed temperature. A comparing circuit includes inputs that receive a reference temperature and the sensed temperature and an output connected to the control terminal of the second switch. ## Claims ### Claim 1 A discharge circuit for an inductive load, comprising: a clamp circuit connected between a first reference potential and an output node, wherein the inductive load is connected to the output node; a temperature sensing circuit to generate a sensed temperature signal based on a temperature of the clamp circuit; and a first circuit including: a first switch connected between the output node and a second reference potential; and a comparing circuit to selectively open and close the first switch based on the sensed temperature signal; wherein the comparing circuit turns on the first switch when the sensed temperature signal is greater than a reference temperature signal by a predetermined amount to cause power to be dissipated from the inductive load by the first switch at a first rate and turns off the first switch when the sensed temperature signal falls below the reference temperature signal by the predetermined amount; wherein the first switch dissipates power at the first rate until the sensed temperature signal falls below the reference temperature signal by the predetermined amount; and wherein the clamp circuit dissipates power at a second rate greater than the first rate after the sensed temperature signal falls below the reference temperature signal by the predetermined amount. ### Claim 2 (depends on 1) The discharge circuit of claim 1, wherein the clamp circuit includes: a second switch having a first terminal connected to the first reference potential and a second terminal connected to the output node; and a Zener diode having an anode connected to the output node and a cathode connected to the first reference potential. ### Claim 3 (depends on 2) The discharge circuit of claim 2, wherein: the first switch comprises first and second transistors including (DMOS) field effect transistor (FETs); and the second switch comprises a double-diffused metal oxide semiconductor DMOS FET. ### Claim 4 (depends on 2) The discharge circuit of claim 2, wherein: the first switch includes first and second transistors including body to epitaxial diodes; and the second switch comprises a transistor including a body to epitaxial diode. ### Claim 5 (depends on 1) The discharge circuit of claim 1, wherein the discharge circuit is implemented as an integrated circuit. ### Claim 6 A discharge circuit comprising: a first circuit including a first switch and a Zener diode, wherein the first circuit is connected to a first reference potential; a second switch connected to the first circuit and a second reference potential; an inductive load having a first terminal connected to the first circuit and the second switch and a second terminal connected to the second reference potential; and a second circuit to: turn off the second switch when a sensed temperature signal corresponding to the first circuit is less than a reference temperature signal to cause power to be dissipated from the inductive load by the first circuit at a first rate; and in response to the sensed temperature signal of the first circuit being greater than or equal to the reference temperature signal, turn on the second switch to cause power to be dissipated from the inductive load by the second switch at a second rate that is less than the first rate; wherein the second switch dissipates current at the second rate until the sensed temperature signal falls below the reference temperature signal by a predetermined amount; and wherein the first switch dissipates current at the first rate after the sensed temperature signal falls below the reference temperature signal by the predetermined amount. ### Claim 7 (depends on 6) The discharge circuit of claim 6, wherein: the first switch comprises a double-diffused metal oxide semiconductor (DMOS) field effect transistor (FET); and the second switch comprises first and second transistors including DMOS FETs. ### Claim 8 (depends on 6) The discharge circuit of claim 6, wherein the second circuit comprises a comparing circuit. ### Claim 9 (depends on 6) The discharge circuit of claim 6, wherein: the first switch comprises a transistor including a body to epitaxial diode; and the second switch includes first and second transistors including body to epitaxial diodes. ### Claim 10 (depends on 6) The discharge circuit of claim 6, wherein the discharge circuit is implemented as an integrated circuit.