# US 11,309,130 B2 · Multilayer ceramic capacitor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,130 B2 - Document ID: US11309130B2 - Status: Granted - Kind: B2 - Application number: 16/822,064 - Filed: 2020-03-18 - Published: 2020-10-01 - Granted: 2022-04-19 - Earliest claimed: 2019-03-28 - Assignees: Murata Manufacturing Co., Ltd. - Applicants: Murata Manufacturing Co., Ltd. - Inventors: Hitoaki Kimura - Web page: https://patentgrep.com/patent/US11309130B2 ## CPC - H01G 4/30: Stacked capacitors (H01G4/33 takes precedence) - H01G 4/012: Form of non-self-supporting electrodes - H01G 4/1209: {characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence)} - H01G 4/232: electrically connecting two or more layers of a stacked or rolled capacitor - H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10) ## Abstract A multilayer ceramic capacitor includes a laminate and an external electrode, the laminate includes a central layer portion in which first and second internal electrode layers are alternately laminated with a dielectric ceramic layer therebetween, a peripheral layer portion sandwiching the central layer portion in a lamination direction and made of a ceramic material, and a side margin sandwiching the central layer portion and the peripheral layer portion in a width direction and made of a ceramic material, the side margin includes an inner layer on an innermost side in the width direction and an outer layer on an outermost side in the width direction, and an element of an additive of the ceramic material included in the peripheral layer portion is the same as an element of an additive of a ceramic material included in the inner layer. ## Claims ### Claim 1 A multilayer ceramic capacitor comprising: a laminate including a dielectric ceramic layer and an internal electrode layer that are laminated in a lamination direction; and an external electrode connected to the internal electrode layer; wherein the laminate includes a first main surface and a second main surface that oppose each other in the lamination direction, a first lateral surface and a second lateral surface that oppose each other in a width direction perpendicular or substantially perpendicular to the lamination direction, and a first end surface and a second end surface that oppose each other in a length direction perpendicular or substantially perpendicular to the lamination direction and the width direction; the internal electrode layer includes a first internal electrode layer extending to the first end surface and a second internal electrode layer extending to the second end surface so as to oppose the first internal electrode layer with the dielectric ceramic layer therebetween; the external electrode includes a first external electrode disposed on the first end surface and connected to the first internal electrode layer, and a second external electrode disposed on the second end surface and connected to the second internal electrode layer; the laminate includes a central layer portion in which the first internal electrode layer and the second internal electrode layer are alternately laminated with the dielectric ceramic layer therebetween, a peripheral layer portion sandwiching the central layer portion in the lamination direction and made of a ceramic material, and a side margin sandwiching the central layer portion and the peripheral layer portion in the width direction and made of a ceramic material; the side margin includes an inner layer on an innermost side in the width direction and an outer layer on an outermost side in the width direction; an element of an additive of the ceramic material included in the peripheral layer portion is the same as an element of an additive of a ceramic material included in the inner layer; and the element of the additive of the ceramic material included in the inner layer is different from an element of an additive of a ceramic material included in the outer layer. ### Claim 2 (depends on 1) The multilayer ceramic capacitor according to claim 1, wherein an element of a main component of the ceramic material included in the peripheral layer portion is the same as an element of a main component of a ceramic material included in the inner layer. ### Claim 3 (depends on 2) The multilayer ceramic capacitor according to claim 2, wherein an element of a main component of a ceramic material included in the central layer portion is the same as the element of the main component of the ceramic material included in the inner layer. ### Claim 4 (depends on 1) The multilayer ceramic capacitor according to claim 1, wherein a thickness of each of the first internal electrode layer and the second internal electrode layer is about 0.4 μm or less. ### Claim 5 (depends on 4) The multilayer ceramic capacitor according to claim 4, wherein the thickness of each of the first internal electrode layer and the second internal electrode layer is about 0.38 μm or less. ### Claim 6 (depends on 1) The multilayer ceramic capacitor according to claim 1, wherein a thickness of the dielectric ceramic layer is about 0.55 μm or less. ### Claim 7 (depends on 1) The multilayer ceramic capacitor according to claim 1, wherein each of the first external electrode and the second external electrode includes a Ni layer including Ni and a ceramic material; and the ceramic material is present in the Ni layer in an amount of about 25 area % or more and about 40 area % or less. ### Claim 8 A multilayer ceramic capacitor comprising: a laminate including a dielectric ceramic layer and an internal electrode layer that are laminated in a lamination direction; and an external electrode connected to the internal electrode layer; wherein the laminate includes a first main surface and a second main surface that oppose each other in the lamination direction, a first lateral surface and a second lateral surface that oppose each other in a width direction perpendicular or substantially perpendicular to the lamination direction, and a first end surface and a second end surface that oppose each other in a length direction perpendicular or substantially perpendicular to the lamination direction and the width direction; the internal electrode layer includes a first internal electrode layer extending to the first end surface and a second internal electrode layer extending to the second end surface so as to oppose the first internal electrode layer with the dielectric ceramic layer therebetween; the external electrode includes a first external electrode disposed on the first end surface and connected to the first internal electrode layer, and a second external electrode disposed on the second end surface and connected to the second internal electrode layer; the laminate includes a central layer portion in which the first internal electrode layer and the second internal electrode layer are alternately laminated with the dielectric ceramic layer therebetween, a peripheral layer portion sandwiching the central layer portion in the lamination direction and made of a ceramic material, and a side margin sandwiching the central layer portion and the peripheral layer portion in the width direction and made of a ceramic material; the side margin includes an inner layer on an innermost side in the width direction and an outer layer on an outermost side in the width direction; a content of Si in the peripheral layer portion is equal or substantially equal to a content of Si in the inner layer; an element of an additive of the ceramic material included in the peripheral layer portion is the same as an element of an additive of a ceramic material included in the inner layer; and the element of the additive of the ceramic material included in the inner layer is different from an element of an additive of a ceramic material included in the outer layer. ### Claim 9 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein a content of Si in the central layer portion is equal or substantially equal to a content of Si in the inner layer. ### Claim 10 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein a content of Si in the outer layer is larger than a content of Si in the inner layer. ### Claim 11 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein an element of a main component of the ceramic material included in the peripheral layer portion is the same as an element of a main component of a ceramic material included in the inner layer. ### Claim 12 (depends on 11) The multilayer ceramic capacitor according to claim 11, wherein an element of a main component of a ceramic material included in the central layer portion is the same as the element of the main component of the ceramic material included in the inner layer. ### Claim 13 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein a thickness of each of the first internal electrode layer and the second internal electrode layer is about 0.4 μm or less. ### Claim 14 (depends on 13) The multilayer ceramic capacitor according to claim 13, wherein the thickness of each of the first internal electrode layer and the second internal electrode layer is about 0.38 μm or less. ### Claim 15 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein a thickness of the dielectric ceramic layer is about 0.55 μm or less. ### Claim 16 (depends on 8) The multilayer ceramic capacitor according to claim 8, wherein each of the first external electrode and the second external electrode includes a Ni layer including Ni and a ceramic material; and the ceramic material is present in the Ni layer in an amount of about 25 area % or more and about 40 area % or less. ### Claim 17 A multilayer ceramic capacitor comprising: a laminate including a dielectric ceramic layer and an internal electrode layer that are laminated in a lamination direction; and an external electrode connected to the internal electrode layer; wherein the laminate includes a first main surface and a second main surface that oppose each other in the lamination direction, a first lateral surface and a second lateral surface that oppose each other in a width direction perpendicular or substantially perpendicular to the lamination direction, and a first end surface and a second end surface that oppose each other in a length direction perpendicular or substantially perpendicular to the lamination direction and the width direction; the internal electrode layer includes a first internal electrode layer extending to the first end surface and a second internal electrode layer extending to the second end surface so as to oppose the first internal electrode layer with the dielectric ceramic layer therebetween; the external electrode includes a first external electrode disposed on the first end surface and connected to the first internal electrode layer, and a second external electrode disposed on the second end surface and connected to the second internal electrode layer; the laminate includes a central layer portion in which the first internal electrode layer and the second internal electrode layer are alternately laminated with the dielectric ceramic layer therebetween, a peripheral layer portion sandwiching the central layer portion in the lamination direction and made of a ceramic material, and a side margin sandwiching the central layer portion and the peripheral layer portion in the width direction and made of a ceramic material; the side margin includes an inner layer on an innermost side in the width direction and an outer layer on an outermost side in the width direction; a content of Si in the peripheral layer portion is equal or substantially equal to a content of Si in the inner layer; and a content of Si in the central layer portion is equal or substantially equal to the content of Si in the inner layer.