# US 11,309,119 B2 · On-chip balun transformer

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- Number: US 11,309,119 B2
- Document ID: US11309119B2
- Status: Granted
- Kind: B2
- Application number: 16/034,680
- Filed: 2018-07-13
- Published: 2019-06-13
- Granted: 2022-04-19
- Earliest claimed: 2017-12-12
- Assignees: Airoha Technology Corp.
- Applicants: Airoha Technology Corp.
- Inventors: Kuo-Yu Tseng; Shih-Chieh Chien
- Web page: https://patentgrep.com/patent/US11309119B2

## CPC

- H01F 27/2804: {Printed windings}
- H01F 21/12: discontinuously variable, e.g. tapped
- H03H 1/00: Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network (constructional details of electromechanical transducers H03H9/00)
- H03H 7/42: Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
- H10D 1/20: Inductors
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H01F 27/2809: {on stacked layers}
- H03H 2001/0085: {Multilayer, e.g. LTCC, HTCC, green sheets}
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An on-chip balun transformer including a primary winding and a secondary winding is provided. The primary winding includes at least one parallel coil and a plurality of first serial semi-turn coils connected to the at least one parallel coil. The secondary winding, magnetically coupled to the primary winding, includes a plurality of second serial semi-turn coils connected to each other. At least one of the second serial semi-turn coils is located within the at least one parallel coil. The primary winding and the secondary winding are coplanar.

## Claims

### Claim 1

An on-chip balun transformer, comprising:
a primary winding, wherein the primary winding is an asymmetrical winding inductor and comprises at least one parallel-connected coil and a plurality of first serial semi-turn coils connected to the at least one parallel-connected coil through a plurality of first metal bridges;
a secondary winding magnetically coupled to the primary winding, wherein the secondary winding is a symmetrical winding inductor and comprises a plurality of second serial semi-turn coils connected to each other through a plurality of second metal bridges, wherein only a part of the second metal bridges is intersected with the first metal bridges;
wherein, at least one of the second serial semi-turn coils is located within the at least one parallel-connected coil;
the primary winding and the secondary winding are coplanar.

### Claim 2 (depends on 1)

The on-chip balun transformer according to claim 1, wherein, the at least one parallel-connected coil comprises a plurality of parallel-connected semi-turn coils each comprising a plurality of semi-turn coils and a first metal bridge group, the first metal bridge group connects terminals of the semi-turn coils and crosses over the second serial semi-turn coils of the secondary winding.

### Claim 3 (depends on 1)

The on-chip balun transformer according to claim 1, wherein, the at least one parallel-connected coil comprises at least one parallel-connected full-turn coil comprising a plurality of semi-turn coils and a second metal bridge group, the second metal bridge group connects terminals of the semi-turn coils and crosses over the second serial semi-turn coils of the secondary winding.

### Claim 4 (depends on 2)

The on-chip balun transformer according to claim 2, wherein, the on-chip balun transformer is formed in N metal layers (N is a positive integer) on a semiconductor substrate in a bottom-up manner,
the parallel-connected coil, the first serial semi-turn coils and the second serial semi-turn coils is formed on an N-th metal layer of the N metal layers;
the first metal bridge group is formed on an (N-1)-th metal layer of the N metal layers;
the on-chip balun transformer further comprises a third metal bridge group formed on a second metal layer to an (N-2)-th metal layer of the N metal layers.

### Claim 5 (depends on 3)

The on-chip balun transformer according to claim 3, wherein, the on-chip balun transformer is formed in N metal layers (N is a positive integer) on a semiconductor substrate in a bottom-up manner,
the parallel-connected coil, the first serial semi-turn coils and the second serial semi-turn coils are formed on an N-th metal layer of the N metal layers;
the second metal bridge group is formed on an (N-1)-th metal layer of the N metal layers;
the on-chip balun transformer further comprises a third metal bridge group formed on a second metal layer to an (N-2)-th metal layer of the N metal layers.