# US 11,309,056 B2 · Automatic test equipment method for testing system in a package devices

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- Number: US 11,309,056 B2
- Document ID: US11309056B2
- Status: Granted
- Kind: B2
- Application number: 16/482,063
- Filed: 2018-01-31
- Published: 2020-02-20
- Granted: 2022-04-19
- Earliest claimed: 2017-01-31
- Assignees: Octavo Systems LLC
- Applicants: Octavo Systems LLC
- Inventors: Kevin Michael Troy
- Web page: https://patentgrep.com/patent/US11309056B2

## CPC

- G01R 31/318505: {Test of Modular systems, e.g. Wafers, MCM's}
- G11C 29/56: External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G01R 31/31713: {Input or output interfaces for test, e.g. test pins, buffers (for scan test G01R31/318572)}
- G01R 31/31813: {Test pattern generators}
- G01R 31/318552: {Clock circuits details}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

Systems, methods, and computer program products directed to testing a System-in-a-Package (SIP) using an Automatic Test Equipment (ATE) machine. A functional representation of one or more tests to be performed in the SIP is loaded in a memory located on a load board, the load board located on the ATE machine. A test controller located on at least one of the SIP and the load board is caused to retrieve and store the one or more tests to be performed in the SIP. The test controller is instructed to conduct the one or more tests in the SIP.

## Claims

### Claim 1

A method performed by an Automatic Test Equipment (ATE) machine for testing a System-in-a-Package (SIP) using the ATE machine, the method comprising:
the ATE loading, into a memory, a state machine configured to execute one or more tests in said SIP under test and a functional representation of one or more tests to be performed in said SIP under test, wherein the memory is located on a load board, and said load board is a separate device connected to said ATE machine;
causing a test controller to retrieve and store from said memory said state machine and to retrieve and store the one or more tests to be performed in the SIP under test, wherein said test controller is one of a microprocessor, a microcontroller, a logic circuit, and configurable logic gates, and
instructing said test controller to conduct the one or more tests in said SIP under test.

### Claim 2 (depends on 1)

The method of claim 1, wherein said test controller is configured to use said state machine to conduct the one or more tests in said SIP under test.

### Claim 3 (depends on 1)

The method of claim 1, further comprising:
verifying the load board before said loading in said memory, and
after verifying the load board, performing said loading.

### Claim 4 (depends on 3)

The method of claim 3, further comprising:
conducting a first test to confirm proper external connections of said SIP under test with said load board before causing the test controller to retrieve and store the one or more tests.

### Claim 5 (depends on 4)

The method of claim 4, further comprising:
conducting a second test to measure and compare one or more of voltage levels and clock frequencies of said SIP under test before causing the test controller to retrieve and store the one or more tests.

### Claim 6 (depends on 1)

The method of claim 1, further comprising:
receiving test results from said test controller for each of the one or more tests,
after receiving a test result for each of the one or more tests, controlling the test controller to (1) continue conducting the one or more tests or (2) conclude conducting the one or more tests, and
determining whether the SIP under test correctly passed the one or more tests based on the received test results.

### Claim 7 (depends on 6)

The method of claim 6, further comprising:
routing the SIP to an appropriate bin based on the determination of whether the SIP under test correctly passed all of the one or more tests.

### Claim 8 (depends on 1)

The method of claim 1, wherein the test controller is located on said load board.

### Claim 9 (depends on 1)

The method of claim 1, wherein the test controller is located on said SIP under test.

### Claim 10 (depends on 9)

The method of claim 9, wherein said loading into memory is performed using a first connection between the ATE and the memory on said load board, and wherein at least one of: (i) said causing the test controller to retrieve and store, and (ii) said instructing, are performed using a second connection between the ATE and the SIP under test.

### Claim 11 (depends on 10)

The method of claim 10, wherein said retrieving and storing by the test controller is performed using a third connection between the memory on said the load board and the SIP under test.

### Claim 12

A computer program product comprising a non-transitory computer readable medium storing a computer program for testing a System-in-a-Package (SIP) using an Automatic Test Equipment (ATE) machine, the computer program comprising computer program code which, when run on said ATE machine, causes said ATE machine to perform a set of operations comprising:
loading, into a memory, a functional representation of one or more tests to be performed in the SIP under test and a state machine configured to execute the one or more tests, wherein the memory is located on a load board, and said load board is a separate device connected to said ATE machine;
causing a test controller to retrieve and store, from said memory, the state machine and the one or more tests to be performed in the SIP under test; and
instructing the test controller to conduct the one or more tests in the SIP under test.

### Claim 13 (depends on 12)

The computer program product of claim 12, wherein said test controller is configured to use said state machine to conduct the one or more tests in said SIP under test.

### Claim 14 (depends on 12)

The computer program product of claim 12, the computer program comprising computer program code which, when run on said ATE machine, causes said ATE machine to perform a set of operations further comprising:
verifying the load board before loading the functional representation of one or more tests in the memory, and
after verifying the load board, performing said loading.

### Claim 15 (depends on 14)

The computer program product of claim 14, the computer program comprising computer program code which, when run on said ATE machine, causes said ATE machine to perform a set of operations further comprising:
conducting a first series of tests to confirm proper external connections of the SIP and conducting a second series of tests to measure and compare one or more of voltage levels and clock frequencies of the SIP under test, before causing said test controller to retrieve and load the one or more tests.

### Claim 16 (depends on 15)

The computer program product of claim 15, the computer program comprising computer program code which, when run on said ATE machine, causes said ATE machine to perform a set of operations further comprising:
receiving test results from the test controller for each of the one or more tests, after receiving a test result for each of the one or more tests, controlling the test controller to (1) continue conducting the one or more tests or (2) conclude conducting the one or more tests, and determining whether the SIP correctly passed the one or more tests based on the received test results.

### Claim 17 (depends on 16)

The computer program product of claim 16, the computer program comprising computer program code which, when run on said ATE machine, causes said ATE machine to perform a set of operations further comprising:
routing said determining whether the SIP correctly passed the one or more tests based on the received test results SIP under test to an appropriate bin based on the determination of whether the SIP correctly passed all of the one or more tests.

### Claim 18

A method for testing a System-in-a-Package (SIP) using an Automatic Test Equipment (ATE) machine, said ATE machine comprising a load board, the method comprising:
verifying said load board using said ATE machine;
conducting one or more power-off tests on the SIP, wherein the SIP is loaded on the load board and wherein the one or more power-off tests comprise a continuity test using said ATE machine;
conducting one or more power-on tests on the SIP, wherein the one or more power-on tests comprise voltage measurements using said ATE machine; and
instructing a test controller to conduct one or more power-on tests in the SIP by performing a process comprising releasing a reset for the test controller and verifying a boot of the test controller,
wherein the test controller is located on one of the load board and the SIP, and
wherein the one or more power-on tests conducted by the test controller comprises a MAC ID read, a DRAM test, a general purpose input output (GPIO) test, an analog-to-digital converter (ADC) test, and one or more frequency tests.

### Claim 19 (depends on 18)

The method of claim 18, wherein the test controller is one of:
a microprocessor, a microcontroller, a logic circuit, and configurable logic gates.

### Claim 20 (depends on 19)

The method of claim 19, further comprising:
determining whether the SIP correctly passed the one or more power-off tests and the one or more power-on tests using said ATE machine; and
sorting the SIP under test to an appropriate bin based on the determination of whether the SIP correctly passed the one or more power-off tests and the one or more power-on tests using said ATE machine.
