# US 11,309,040 B2 · Managed NAND performance throttling

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- Number: US 11,309,040 B2
- Document ID: US11309040B2
- Status: Granted
- Kind: B2
- Application number: 17/147,222
- Filed: 2021-01-12
- Published: 2021-05-06
- Granted: 2022-04-19
- Earliest claimed: 2017-07-07
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Greg A. Blodgett; Sebastien Andre Jean
- Web page: https://patentgrep.com/patent/US11309040B2

## CPC

- G11C 16/3418: {Disturbance prevention or evaluation; Refreshing of disturbed memory data}
- G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G06F 3/0601: {Interfaces specially adapted for storage systems}
- G06F 3/0614: {Improving the reliability of storage systems}
- G06F 3/0622: {in relation to access}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 9/30101: {Special purpose registers}
- G06F 9/321: {Program or instruction counter, e.g. incrementing}
- G06F 9/546: {Message passing systems or structures, e.g. queues}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 12/1416: {by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights (G06F12/1458 takes precedence)}
- G06F 12/1425: {the protection being physical, e.g. cell, word, block}
- G06F 12/1441: {for a range}
- G06F 12/1458: {by checking the subject access rights}
- G06F 12/1466: {Key-lock mechanism}
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- G11C 7/04: with means for avoiding disturbances due to temperature effects
- G11C 16/0408: {comprising cells containing floating gate transistors (G11C16/0483, G11C16/0491 take precedence)}
- G11C 16/0483: {comprising cells having several storage transistors connected in series}
- G11C 16/3427: {Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written}
- H04L 9/0861: {Generation of secret information including derivation or calculation of cryptographic keys or passwords}
- G11C 16/10: Programming or data input circuits
- G11C 16/3459: {Circuits or methods to verify correct programming of nonvolatile memory cells}
- G11C 2213/71: Three dimensional array
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Apparatus and methods are disclosed, including a memory device or a memory controller configured to determine that a condition has occurred that indicates a performance throttling operation, implement a performance throttling responsive to the determined condition, responsive to implementing the performance throttling, set a performance throttling status indicator in an exception event status attribute, receive a command from a host device across a memory device interface, perform the command, prepare a response to the command, the response including a flag indicating that the performance throttling status indicator is set in the exception event status attribute, and send the response to the host device. Methods of operation are disclosed, as well as machine-readable medium and other embodiments.

## Claims

### Claim 1

A computing device comprising:
a non-volatile memory array;
a memory controller configured to perform operations comprising:
issuing a memory read or write command to a memory device across a memory device interface, the memory read or write command requesting the memory device read or write data to or from a memory array of the memory device;
receiving a response to the memory read or write command;
identifying that the response includes a flag indicating a performance throttling of the memory device is occuring;
responsive to identifying that the response includes the flag:
sending a query request to the memory device to request a reason for the performance throttling;
receiving a query response with the reason for the performance throttling;
selecting at least one action based upon the reason, the at least one action selected to stop the performance throttling of the memory device; and
performing the at least one action.

### Claim 2 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises turning on a fan of the computing device.

### Claim 3 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises reducing a charging speed of a recharging of a battery of the computing device.

### Claim 4 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises turning off one or more wireless radios.

### Claim 5 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises throttling a performance of a processor of the computing device.

### Claim 6 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is a cell degradation of a Single Level Cell (SLC) cache of the memory device and wherein the at least one action comprises reallocating space from a Multi Level Cell (MLC) storage of the memory device to the SLC cache by issuance of a memory device command.

### Claim 7 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is low free space in a memory pool of the memory device and wherein the at least one action comprises increasing a free space in the memory pool by issuance of a memory device command.

### Claim 8 (depends on 1)

The computing device of claim 1, wherein the reason for the performance throttling is low free space on the memory device and wherein the at least one action comprises deleting items stored on the memory device by issuance of a memory device command.

### Claim 9

A method comprising:
using one or more processors of a computing device:
issuing a memory read or write command to a memory device across a memory device interface, the memory read or write command requesting the memory device read or write data to or from a memory array of the memory device;
receiving a response to the memory read or write command;
identifying that the response includes a flag indicating that a performance throttling of the memory device is occuring; and
responsive to identifying that the response includes the flag:
sending a query request to the memory device to request a reason for the performance throttling;
receiving a query response with the reason for the performance throttling;
selecting at least one action based upon the reason, the at least one action selected to stop the performance throttling of the memory device; and
performing the at least one action.

### Claim 10 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises turning on a fan of the computing device.

### Claim 11 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises reducing a charging speed of a recharging of a battery of the computing device.

### Claim 12 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises turning off one or more wireless radios.

### Claim 13 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the at least one action comprises throttling a performance of a processor of the computing device.

### Claim 14 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is a cell degradation of a Single Level Cell (SLC) cache of the memory device and wherein the at least one action comprises reallocating space from a Multi Level Cell (MLC) storage of the memory device to the SLC cache by issuance of a memory device command.

### Claim 15 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is low free space in a memory pool of the memory device and wherein the at least one action comprises increasing a free space in the memory pool by issuance of a memory device command.

### Claim 16 (depends on 9)

The method of claim 9, wherein the reason for the performance throttling is low free space on the memory device and wherein the at least one action comprises deleting items stored on the memory device by issuance of a memory device command.

### Claim 17

A non-transitory machine-readable medium, storing instructions, which when performed by a machine, causes the machine to perform operations comprising:
issuing a memory read or write command to a memory device across a memory device interface, the memory read or write command requesting the memory device read or write data to or from a memory array of the memory device;
receiving a response to the memory device read or write command;
identifying that the response includes a flag indicating that a performance throttling of the memory device is occuring; and
responsive to identifying that the response includes the flag:
sending a query request to the memory device to request a reason for the performance throttling;
receiving a query response with the reason for the performance throttling;
selecting at least one action based upon the reason, the at least one action selected to stop the performance throttling of the memory device; and
performing the at least one action.

### Claim 18 (depends on 17)

The non-transitory machine-readable medium of claim 17, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the operations of performing at least one action comprises turning on a fan of the machine.

### Claim 19 (depends on 17)

The non-transitory machine-readable medium of claim 17, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the operations of performing at least one action comprises reducing a charging speed of a recharging of a battery of the machine.

### Claim 20 (depends on 17)

The non-transitory machine-readable medium of claim 17, wherein the reason for the performance throttling is a high temperature of the memory device and wherein the operations of performing at least one action comprises turning off one or more wireless radios.