# US 11,309,037 B2 · Voltage switching circuit and semiconductor memory device having the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,309,037 B2 - Document ID: US11309037B2 - Status: Granted - Kind: B2 - Application number: 16/902,878 - Filed: 2020-06-16 - Published: 2021-07-01 - Granted: 2022-04-19 - Earliest claimed: 2019-12-26 - Assignees: SK hynix Inc. - Applicants: SK hynix Inc. - Inventors: Seung Wan Chae - Web page: https://patentgrep.com/patent/US11309037B2 ## CPC - G11C 16/30: Power supply circuits - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 11/56: using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A voltage switching circuit selectively transfers voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal. The voltage switching circuit includes a first transistor and a second transistor. The first transistor is formed on a first well on a substrate, and is coupled between the first input terminal and the first output terminal. The second transistor is formed on a second well different from the first well, and is coupled to the second input terminal. In a first mode in which a first voltage applied to the first input terminal is transferred to the first output terminal and the second output terminal, the first transistor is turned on and the second transistor is turned off. ## Claims ### Claim 1 A voltage switching circuit for selectively transferring voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal, the voltage switching circuit comprising: a first transistor formed on a first well on a substrate, the first transistor being coupled between the first input terminal and the first output terminal; and a second transistor formed on a second well different from the first well, the second transistor being coupled to the second input terminal, wherein, in a first mode in which a first voltage applied to the first input terminal is transferred to the first output terminal and the second output terminal, the first transistor is turned on and the second transistor is turned off, and wherein the first output terminal and the second output terminal are connected to different planes. ### Claim 2 (depends on 1) The voltage switching circuit of claim 1, wherein, in a second mode in which the first voltage applied to the first input terminal is transferred to the first output terminal and a second voltage applied to the second input terminal is transferred to the second output terminal, the first transistor is turned on and the second transistor is turned on. ### Claim 3 (depends on 2) The voltage switching circuit of claim 2, further comprising a third transistor and a fourth transistor, which are formed on the first well, wherein the third transistor is coupled between the first input terminal and the second output terminal, wherein the fourth transistor is coupled between the second transistor and the second output terminal, wherein, in the first mode, the third transistor is turned on and the fourth transistor is turned off, and wherein, in the second mode, the third transistor is turned off and the fourth transistor is turned on. ### Claim 4 (depends on 3) The voltage switching circuit of claim 3, wherein, in the first mode, the first voltage and the second voltage have different polarities. ### Claim 5 (depends on 2) The voltage switching circuit of claim 2, further comprising a third transistor formed on the first well and a fourth transistor formed on the second well, wherein the third transistor and the fourth transistor are coupled in series between the first input terminal and the second output terminal, wherein, in the first mode, the third transistor and the fourth transistor are turned on, and wherein, in the second mode, the third transistor and the fourth transistor are turned off. ### Claim 6 (depends on 5) The voltage switching circuit of claim 5, wherein, in the second mode, the first voltage and the second voltage have different polarities. ### Claim 7 (depends on 2) The voltage switching circuit of claim 2, further comprising a third transistor and a fourth transistor, which are formed on the first well, and a fifth transistor formed on the second well, wherein the third transistor and the fifth transistor are coupled in series between the first input terminal and the second output terminal wherein the fourth transistor is coupled between the second transistor and the second output terminal, wherein, in the first mode, the third transistor and the fifth transistor are turned on, and the fourth transistor is turned off, and wherein, in the second mode, the third transistor and the fifth transistor are turned off, and the fourth transistor is turned on. ### Claim 8 (depends on 7) The voltage switching circuit of claim 7, wherein, in the first mode, the first voltage and the second voltage have different polarities. ### Claim 9 (depends on 7) The voltage switching circuit of claim 7, wherein, in the second mode, the first voltage and the second voltage have different polarities. ### Claim 10 (depends on 1) The voltage switching circuit of claim 1, wherein the first well and the second well are p-wells. ### Claim 11 A voltage switching circuit for selectively transferring voltages applied to a first input terminal and a second input terminal to a first output terminal and a second output terminal, the voltage switching circuit comprising: a first switching circuit configured to selectively transfer a first voltage applied to the first input terminal to the second output terminal; and a second switching circuit configured to selectively transfer a second voltage applied to the second input terminal to the second output terminal, wherein the first voltage is transferred to the first output terminal, and wherein at least one transistor included in the first switching circuit is formed on a well different from that on which at least one transistor included in the second switching circuit is formed, and wherein the first output terminal and the second output terminal are connected to different planes. ### Claim 12 (depends on 11) The voltage switching circuit of claim 11, wherein, in a first mode, the first switching circuit is activated and the second switching circuit is inactivated, and wherein, in a second mode, the first switching circuit is inactivated and the second switching circuit is activated. ### Claim 13 (depends on 12) The voltage switching circuit of claim 12, wherein the first switching circuit includes a first transistor coupled between the first input terminal and the second output terminal, wherein the second switching circuit includes: a second transistor coupled to the second input terminal; and a third transistor coupled between the second transistor and the second output terminal, and wherein the first transistor and the third transistor are formed on a first well, and the second transistor is formed on a second well different from the first well. ### Claim 14 (depends on 13) The voltage switching circuit of claim 13, wherein, in the first mode, the first voltage and the second voltage have different polarities. ### Claim 15 (depends on 12) The voltage switching circuit of claim 12, wherein the first switching circuit includes: a first transistor coupled to the first input terminal; and a second transistor coupled between the first transistor and the second output terminal, wherein the second switching circuit includes a third transistor coupled between the second input terminal and the second output terminal, and wherein the first transistor is formed on a first well, and the second transistor and the third transistor are formed on a second well different from the first well. ### Claim 16 (depends on 15) The voltage switching circuit of claim 15, wherein, in the second mode, the first voltage and the second voltage have different polarities. ### Claim 17 (depends on 12) The voltage switching circuit of claim 12, wherein the first switching circuit includes: a first transistor coupled to the first input terminal; and a second transistor coupled between the first transistor and the second output terminal, wherein the second switching circuit includes: a third transistor coupled to the second input terminal; and a fourth transistor coupled between the third transistor and the second output terminal, and wherein the first transistor and the fourth transistor are formed on a first well, and the second transistor and the third transistor are formed on a second well different from the first well. ### Claim 18 (depends on 17) The voltage switching circuit of claim 17, wherein, in the first mode, the first voltage and the second voltage have different polarities. ### Claim 19 (depends on 17) The voltage switching circuit of claim 17, wherein, in the second mode, the first voltage and the second voltage have different polarities. ### Claim 20 A switching circuit comprising: a first transistor configured to transfer a first voltage from a first input node to a first output node; second and third transistors configured to transfer, when turned on, a second voltage from a second input node to a second output node; and a fourth transistor configured to transfer, when turned on, the first voltage to the second output node, wherein the second transistor is formed on a different well from the first, third and fourth transistors, and wherein the first and second voltages have different polarities, and wherein the first output node and the second output node are connected to different planes.