# US 11,308,908 B2 · Liquid crystal display panel and driving method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,308,908 B2 - Document ID: US11308908B2 - Status: Granted - Kind: B2 - Application number: 16/618,368 - Filed: 2019-09-17 - Published: 2021-12-30 - Granted: 2022-04-19 - Earliest claimed: 2019-07-18 - Applicants: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. - Inventors: Shan Wang; Yichien Wen - Web page: https://patentgrep.com/patent/US11308908B2 ## CPC - G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)} - G09G 3/3674: {Details of drivers for scan electrodes} - G09G 3/3611: {Control of matrices with row and column drivers} - G09G 3/3685: {Details of drivers for data electrodes} - G09G 2320/0233: Improving the luminance or brightness uniformity across the screen - G09G 2320/0252: Improving the response speed - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A liquid crystal display panel and a driving method thereof. The liquid crystal display panel comprises: a pixel unit module comprising a plurality of pixel units arranged in a matrix; a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row; a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on; a plurality of data lines respectively connected to at least one pixel unit on different columns; a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to. ## Claims ### Claim 1 A liquid crystal display panel, comprising: a pixel unit module comprising a plurality of pixel units, the plurality of pixel units arranged in a matrix; a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row; a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on; a plurality of data lines, the plurality of data lines are respectively connected to at least one pixel unit on different columns; a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to; wherein the data signals provided by the data driving circuit for the plurality of data lines are sequentially delayed along a direction away from the gate driving circuit that enables a time to be turned on matching a time to be charged for the plurality of pixel units in the liquid crystal display panel; a plurality of monitor lines, each of the monitor lines is respectively connected to a different pixel unit on a same row and monitors the time to be turned on for the pixel unit which each of the monitor lines is connected to; a logic board connected to the plurality of monitor lines and calculating a time difference of at least two of the pixel units, which the same scanning line is connected to, to be turned on by monitoring the times to be turned on for each of the pixel units through the plurality of monitor lines, wherein the logic board is connected to the data driving circuit, and sends the time difference to the data driving circuit to enable the data signals provided by the data driving circuit for the plurality of data lines to be sequentially delayed along the direction away from the gate driving circuit according to the time difference; a timing controller connected to the gate driving circuit and the data driving circuit, and used to control operations of the gate driving circuit and the data driving circuit. ### Claim 2 A liquid crystal display panel, comprising: a pixel unit module comprising a plurality of pixel units, the plurality of pixel units arranged in a matrix; a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row; a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on; a plurality of data lines, the plurality of data lines are respectively connected to at least one pixel unit on different columns; a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to; wherein the data signals provided by the data driving circuit for the plurality of data lines are sequentially delayed along a direction away from the gate driving circuit that enables a time to be turned on matching a time to be charged for the plurality of pixel units in the liquid crystal display panel. ### Claim 3 (depends on 2) The liquid crystal display panel according to claim 2, further comprising: a plurality of monitor lines, each of the monitor lines is respectively connected to a different pixel unit on a same row and monitors the time to be turned on for the pixel unit which each of the monitor lines is connected to; a logic board connected to the plurality of monitor lines and calculating a time difference of at least two of the pixel units, which the same scanning line is connected to, to be turned on by monitoring the times to be turned on for each of the pixel units through the plurality of monitor lines, wherein the logic board is connected to the data driving circuit, and sends the time difference to the data driving circuit to enable the data signals provided by the data driving circuit for the plurality of data lines to be sequentially delayed along the direction away from the gate driving circuit according to the time difference. ### Claim 4 (depends on 3) The liquid crystal display panel according to claim 3, wherein the time to turn on the pixel units is a time for a gate signal voltage of the pixel units reaching 90% of a standard value. ### Claim 5 (depends on 4) The liquid crystal display panel according to claim 4, wherein the standard value is a starting pulse voltage value of the gate driving circuit. ### Claim 6 (depends on 3) The liquid crystal display panel according to claim 3, wherein the logic board controls the data signals provided by the data driving circuit for the plurality of data lines to delay in sequence by shifting the drive signals of the data driving circuit. ### Claim 7 (depends on 3) The liquid crystal display panel according to claim 3, wherein the data driving circuit comprises a plurality of data drive chips, and each of the data drive chips is connected to each of the data lines; wherein the data drive chips are used to provide the drive signals. ### Claim 8 (depends on 7) The liquid crystal display panel according to claim 7, wherein the plurality of the data drive chips are connected to the logic board, and delay the drive signals in sequence in accordance of the time difference calculated by the logic board. ### Claim 9 (depends on 2) The liquid crystal display panel according to claim 2, further comprising: a timing controller connected to the gate driving circuit and the data driving circuit, and used to control operations of the gate driving circuit and the data driving circuit. ### Claim 10 A liquid crystal display device, comprising a liquid crystal display panel, wherein the liquid crystal display panel comprises: a pixel unit module comprising a plurality of pixel units, the plurality of pixel units arranged in a matrix; a plurality of scanning lines, each of the scanning lines connected to at least two of the pixel units on a same row; a gate driving circuit connected to the plurality of scanning lines and providing gate signals for the scanning lines to control the pixel units, which the scanning lines are connected to, to be turned on; a plurality of data lines, the plurality of data lines are respectively connected to at least one pixel unit on different columns; a data driving circuit, which is connected to the plurality of data lines and provides data signals for the data lines to charge the turn-on pixel units which the data lines are connected to; wherein the data signals provided by the data driving circuit for the plurality of data lines are sequentially delayed along a direction away from the gate driving circuit that enables a time to be turned on matching a time to be charged for the plurality of pixel units in the liquid crystal display panel. ### Claim 11 (depends on 10) The liquid crystal display device according to claim 10, wherein the display panel further comprises: a plurality of monitor lines, each of the monitor lines is respectively connected to a different pixel unit on a same row and monitors the time to be turned on for the pixel unit which each of the monitor lines is connected to; a logic board connected to the plurality of monitor lines and calculating a time difference of at least two of the pixel units, which the same scanning line is connected to, to be turned on by monitoring the times to be turned on for each of the pixel units through the plurality of monitor lines, wherein the logic board is connected to the data driving circuit, and sends the time difference to the data driving circuit to enable the data signals provided by the data driving circuit for the plurality of data lines to be sequentially delayed along the direction away from the gate driving circuit according to the time difference. ### Claim 12 (depends on 11) The liquid crystal display device according to claim 11, wherein the time to turn on the pixel units is a time for a gate signal voltage of the pixel units reaching 90% of a standard value. ### Claim 13 (depends on 12) The liquid crystal display device according to claim 12, wherein the standard value is a starting pulse voltage value of the gate driving circuit. ### Claim 14 (depends on 11) The liquid crystal display device according to claim 11, wherein the logic board controls the data signals provided by the data driving circuit for the plurality of data lines to delay in sequence by shifting the drive signals of the data driving circuit. ### Claim 15 (depends on 11) The liquid crystal display device according to claim 11, wherein the data driving circuit comprises a plurality of data drive chips, and each of the data drive chips is connected to each of the data lines; wherein the data drive chips are used to provide the drive signals. ### Claim 16 (depends on 15) The liquid crystal display device according to claim 15, wherein the plurality of the data drive chips are connected to the logic board, and delay the drive signals in sequence in accordance of the time difference calculated by the logic board. ### Claim 17 (depends on 10) The liquid crystal display device according to claim 10, wherein the liquid crystal display panel further comprises: a timing controller connected to the gate driving circuit and the data driving circuit, and used to control operations of the gate driving circuit and the data driving circuit.