# US 11,308,906 B2 · Circuit for providing a temperature-dependent common electrode voltage > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,308,906 B2 - Document ID: US11308906B2 - Status: Granted - Kind: B2 - Application number: 16/345,707 - Filed: 2018-06-12 - Published: 2021-10-21 - Granted: 2022-04-19 - Earliest claimed: 2018-06-12 - Assignees: Chongqing Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Applicants: Chongqing BOE Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd. - Inventors: Sijun Lei; Xu Lu; Shuai Hou; Siqing Fu; Yong Long; Ying Zhang; Shanbin Chen; Fanjian Zeng; Zhicai Xu; Sen Tan; Xinghong Liu; Xiangchao Chen; Yunsong Li; Xin Chen; Yuxu Geng - Web page: https://patentgrep.com/patent/US11308906B2 ## CPC - G09G 3/3655: {Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors} - G09G 3/3607: {for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels (display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127)} - G09G 2320/0257: Reduction of after-image effects - G09G 2320/041: Temperature compensation - G09G 2320/0693: Calibration of display systems - G09G 2330/028: Generation of voltages supplied to electrode drivers in a matrix display other than LCD - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract The present application discloses a circuit for providing a temperature-dependent common electrode voltage. The circuit includes a sensing sub-circuit coupled between a power-supply terminal and a ground terminal and configured to generate a first voltage for controlling a switching sub-circuit to connect the power-supply terminal to a first node. The circuit further includes a compensation sub-circuit coupled between the first node and the ground terminal and be enabled, when the first voltage decreases below a threshold as temperature increases above a threshold temperature, to output a temperature-dependent second voltage proportional to the temperature to a second node. Additionally, the circuit includes an output sub-circuit coupled to the second node combined with a first input-voltage terminal and further coupled to a second input-voltage terminal, to generate a temperature-dependent output voltage based on a weighted mixing of the temperature-dependent second voltage, a first input voltage, and a second input voltage. ## Claims ### Claim 1 A circuit for providing a temperature-dependent common electrode voltage, the circuit comprising: a sensing circuit coupled between a power-supply terminal and a ground terminal and configured to generate a first voltage; a switching circuit configured to connect the power-supply terminal to a first node under control of the first voltage; a compensation circuit coupled between the first node and the ground terminal and being enabled, when the first voltage decreases below a threshold as temperature increases above a threshold temperature, to output a second voltage to a second node, the second voltage being proportional to the temperature; and an output circuit coupled to the second node to receive the second voltage combined with a first input-voltage terminal supplying a first input voltage and further coupled to a second input-voltage terminal supplying a second input voltage, to generate a temperature-dependent output voltage based on a weighted mixing of the second voltage, the first input voltage, and the second input voltage. ### Claim 2 (depends on 1) The circuit of claim 1, wherein the sensing circuit comprises at least a temperature-sensitive resistor connected in series via a joint node to a second resistor between the power-supply terminal and the ground terminal. ### Claim 3 (depends on 2) The circuit of claim 2, wherein the temperature-sensitive resistor is characterized by a positive temperature coefficient with increasing resistance as the temperature increases, wherein the first voltage is provided at the joint node with a fraction of a power-supply voltage from the power-supply terminal, wherein the fraction decreases as temperature increases up to a maximum operation temperature. ### Claim 4 (depends on 3) The circuit of claim 3, wherein the switching circuit comprises a p-channel MOS transistor having a gate electrode coupled to the joint node, a drain electrode coupled to the power-supply terminal to receive a positive voltage, and a source electrode coupled to the first node. ### Claim 5 (depends on 1) The circuit of claim 1, wherein the compensation circuit comprises: a first operational amplifier configured in a linear state with a pair of input voltage ports respectively coupled to a third node and a fourth node and an output port coupled to the first node, wherein the third node and the fourth node are in a virtually short state; a first MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to a first bias terminal, and a source electrode coupled to the third node; a second MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to a second bias terminal, and a source electrode coupled to the fourth node; a third resistor coupled to the fourth node; a third MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to the second bias terminal to receive a second bias voltage, and a source electrode coupled to the second node; a fourth resistor coupled to the second node and the ground terminal; a first bipolar transistor having a collector electrode and a base electrode commonly coupled to the third node, and an emitter electrode coupled to the ground terminal, wherein the first bipolar transistor is characterized by a first saturation current; and a second bipolar transistor having a collector electrode and a base electrode commonly coupled to the third resistor, and an emitter electrode coupled to the ground terminal, wherein the second bipolar transistor is characterized by a second saturation current equal to 1/n of the first saturation current, n being a constant. ### Claim 6 (depends on 5) The circuit of claim 5, wherein the compensation circuit is configured to yield a first current flowing through the third resistor and the second MOS transistor, wherein the first current is equal to a voltage drop between the fourth node and the collector electrode of the second bipolar transistor divided by a resistance of the third resistor and the voltage drop is equal to a voltage difference of a first base-emitter voltage of the first bipolar transistor and a second base-emitter voltage of the second bipolar transistor due to the virtual short state of the third node and the fourth node, wherein the voltage drop is proportional to the temperature at least in a range from the threshold temperature to the maximum operation temperature. ### Claim 7 (depends on 6) The circuit of claim 6, wherein the compensation circuit is configured to yield a second current flowing through the third MOS transistor and the fourth resistor, wherein the second current is equal to the first current due to a common gate-drain voltage shared by the second MOS transistor and the third MOS transistor. ### Claim 8 (depends on 7) The circuit of claim 7, wherein the compensation circuit is configured to output the second voltage at the second node, wherein the second voltage is equal to a product of the voltage drop multiplying a ratio of a resistance of the fourth resistor over the resistance of the third resistor. ### Claim 9 (depends on 1) The circuit of claim 1, wherein the output circuit comprises a second operational amplifier configured as a summing amplifier having a first input port coupled to a first input-voltage terminal via a fifth resistor and the second node via a sixth resistor, a second input port coupled to a second input-voltage terminal via a seventh resistor and the ground terminal via an eighth resistor, and an output port looped back to the first input port via a ninth resistor, wherein the temperature-dependent output voltage is outputted at the output port. ### Claim 10 (depends on 9) The circuit of claim 9, wherein the temperature-dependent output voltage is equal to the first input voltage with a first weighted factor plus the second voltage with a second weighted factor minus the second input voltage with a third weighted factor, wherein the first weighted factor equals to a first ratio of a resistance of the ninth resistor over a resistance of the fifth resistor, the second weighted factor equals to a second ratio of the resistance of the ninth resistor over a resistance of the sixth resistor, and the third weighted factor equals to a multiplication of a sum of 1, the first ratio, and the second ratio and a third ratio of a resistance of the eighth resistor over a sum of the resistance of the eighth resistor and a resistance of the seventh resistor. ### Claim 11 A driving circuit for a display panel, comprising: a row of thin-film transistors respectively associated with one row of an array of subpixels; a common gate receiving a gate driving voltage for controlling the row of thin-film transistors, wherein each thin-film transistor receives a corresponding source voltage signal; a row of effective capacitor groups respectively coupled to drain electrodes of the row of the thin-film transistors, each effective capacitor group being associated with a liquid crystal layer per subpixel; and a common-voltage circuit for supplying a common electrode voltage to a common electrode of the effective capacitor groups, wherein the common-voltage circuit comprises: a sensing circuit coupled between a power-supply terminal and a ground terminal and configured to generate a first voltage; a switching circuit configured to connect the power-supply terminal to a first node under control of the first voltage; a compensation circuit coupled between the first node and the ground terminal and being enabled, when the first voltage decreases below a threshold as temperature increases above a threshold temperature, to output a second voltage to a second node, the second voltage being proportional to the temperature; and an output circuit coupled to the second node to receive the second voltage combined with a first input-voltage terminal supplying a first input voltage and further coupled to a second input-voltage terminal supplying a second input voltage, to generate a temperature-dependent output voltage based on a weighted mixing of the second voltage, the first input voltage, and the second input voltage. ### Claim 12 (depends on 11) The driving circuit of claim 11, wherein the sensing circuit comprises at least a temperature-sensitive resistor with a positive temperature coefficient connected in series via a joint node to a second resistor between the power-supply terminal supplying a power-supply voltage and the ground terminal, to provide the first voltage at the joint node with a fraction of the power-supply voltage, wherein the fraction decreases as temperature increases up to a maximum operation temperature. ### Claim 13 (depends on 12) The driving circuit of claim 12, wherein the switching circuit comprises a p-channel MOS transistor having a gate electrode coupled to the joint node, a drain electrode coupled to the power-supply terminal to receive a positive voltage, and a source electrode coupled to the first node, wherein the p-channel MOS transistor is switched to a conduction state when a difference between the first voltage and the power-supply voltage is equal to or smaller than a threshold voltage of the p-channel MOS transistor. ### Claim 14 (depends on 11) The driving circuit of claim 11, wherein the compensation circuit comprises: a first operational amplifier configured in a linear state with a pair of input ports respectively coupled to a third node and a fourth node and an output port coupled to the first node, wherein the third node and the fourth node are in a virtually short state; a first MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to a first bias terminal, and a source electrode coupled to the third node; a second MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to a second bias terminal, and a source electrode coupled to the fourth node; a third resistor coupled to the fourth node; a third MOS transistor having a drain electrode coupled to the first node, a gate electrode coupled to the second bias terminal to receive a second bias voltage, and a source electrode coupled to the second node; a fourth resistor coupled to the second node and the ground terminal; a first bipolar transistor having a collector electrode and a base electrode commonly coupled to the third node, and an emitter electrode coupled to the ground terminal, wherein the first bipolar transistor is characterized by a first saturation current; and a second bipolar transistor having a collector electrode and a gate electrode commonly coupled to the third resistor, and an emitter electrode coupled to the ground terminal, wherein the second bipolar transistor is characterized by a second saturation current equal to 1/n of the first saturation current, n being a constant. ### Claim 15 (depends on 14) The driving circuit of claim 14, wherein the compensation circuit is configured to yield a first current flowing through the third resistor and the second MOS transistor, wherein the first current is proportional to the temperature at least in a range from the threshold temperature to the maximum operation temperature, and further configured to yield a second current flowing through the third MOS transistor and the fourth resistor, wherein the second current is equal to the first current due to a common gate-drain voltage shared by the second MOS transistor and the third MOS transistor, wherein the second current results in the second voltage at the second node to be proportional to the temperature up to the maximum operation temperature. ### Claim 16 (depends on 11) The driving circuit of claim 11, wherein the output circuit comprises a second operational amplifier configured as a summing amplifier having a first input port coupled to a first input-voltage terminal via a fifth resistor and the second node via a sixth resistor, a second input port coupled to a second input-voltage terminal via a seventh resistor and the ground terminal via an eighth resistor, and an output port looped back to the first input port via a ninth resistor, wherein the temperature-dependent output voltage is outputted at the output port. ### Claim 17 (depends on 16) The driving circuit of claim 16, wherein the temperature-dependent output voltage is equal to the first input voltage with a first weighted factor plus the second voltage with a second weighted factor minus the second input voltage with a third weighted factor, wherein the first weighted factor equals to a first ratio of a resistance of the ninth resistor over a resistance of the fifth resistor, the second weighted factor equals to a second ratio of the resistance of the ninth resistor over a resistance of the sixth resistor, and the third weighted factor equals to a multiplication of a sum of 1, the first ratio, and the second ratio and a third ratio of a resistance of the eighth resistor over a sum of the resistance of the eighth resistor and a resistance of the seventh resistor. ### Claim 18 (depends on 11) The driving circuit of claim 11, further comprising a buffer circuit to output the temperature-dependent output voltage as a common electrode voltage applied to the common electrode to substantially minimize an effective voltage induced by ion impurities as temperature increases above the threshold temperature up to a maximum operation temperature. ### Claim 19 (depends on 11) A display panel comprises the driving circuit of claim 11.