# US 11,308,858 B2 · Signal processing device and image display apparatus including same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,308,858 B2 - Document ID: US11308858B2 - Status: Granted - Kind: B2 - Application number: 17/030,510 - Filed: 2020-09-24 - Published: 2021-05-20 - Granted: 2022-04-19 - Earliest claimed: 2019-09-24 - Assignees: LG Electronics Inc. - Applicants: LG Electronics Inc. - Inventors: Jihoon Lee; Jongchan Kim; Kyeongryeol Park; Jeonghyu Yang; Seoksoo Lee; Byungtae Choi - Web page: https://patentgrep.com/patent/US11308858B2 ## CPC - G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)} - G09G 3/3208: organic, e.g. using organic light-emitting diodes [OLED] - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 5/005: {Adapting incoming signals to the display format of the display terminal} - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - G09G 5/18: Timing circuits for raster scan displays (specially adapted for television H04N {; synchronisation between the display unit and other display units, videodisc player G09G5/12}) - G09G 5/373: for modifying the size of the graphic pattern - G09G 5/391: Resolution modifying circuits, e.g. variable screen formats - G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/0626: for control of overall brightness - G09G 2330/021: Power management, e.g. power saving - G09G 2330/04: Display protection - G09G 2340/0407: Resolution change, inclusive of the use of different resolutions for different screen areas - G09G 2340/0435: Change or adaptation of the frame rate of the video stream - G09G 2360/02: Graphics controller able to handle multiple formats, e.g. input or output formats - G09G 2360/16: Calculation or use of calculated indices related to luminance levels in display data - G09G 2360/18: Use of a frame buffer in a display terminal, inclusive of the display panel - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract The present disclosure relates to a signal processing device and an image display apparatus including the same. A signal processing device according to an embodiment of the present disclosure includes: an input interface to receive an image signal; a first image processor to generate first image frame data based on the image signal; a second image processor to generate second image frame data scaled down from the first image frame data based on the image signal; and an output interface to receive the first image frame data from the first image processor and the second image frame data from the second image processor and to output the first image frame data and the second image frame data, wherein the first image frame data output from the output interface is more delayed than the second image frame data output from the output interface. Accordingly, a timing controller may accurately and rapidly perform signal processing for a panel. ## Claims ### Claim 1 A signal processing device comprising: an input interface configured to receive an image signal; a first image processor configured to generate first image frame data based on the image signal; a second image processor configured to generate second image frame data scaled down from the first image frame data based on the image signal; and an output interface configured to receive the first image frame data from the first image processor and the second image frame data from the second image processor and to output the first image frame data and the second image frame data, wherein the first image frame data output from the output interface is more delayed than the second image frame data output from the output interface, wherein the output interface outputs a data enable signal divided into active periods and blank periods, and wherein a second active period of a second data enable signal when the first image frame data and the second image frame data are output is greater than a first active period of a first data enable signal when only the first image frame data is output. ### Claim 2 (depends on 1) The signal processing device according to claim 1, wherein, when the output first image frame data is n frame data, the output interface outputs frame data after the n frame data as the second image frame data. ### Claim 3 (depends on 1) The signal processing device according to claim 1, further comprising a memory to store frame data for image processing of the first image processor. ### Claim 4 (depends on 1) The signal processing device according to claim 1, wherein the output interface includes a first output terminal for transmitting vertical synchronization signal, a second output terminal for transmitting horizontal synchronization signal, a third output terminal for transmitting image data signal, and a fourth output terminal for transmitting data enable signal, wherein the first image frame data and the second image frame data are transmitted through the third output terminal. ### Claim 5 (depends on 1) The signal processing device according to claim 1, wherein a second blank period of the second data enable signal when the first image frame data and the second image frame data are output is less than a first blank period of the first data enable signal when only the first image frame data is output. ### Claim 6 (depends on 1) The signal processing device according to claim 1, wherein the output interface sets a length of the active period based on resolution information of a panel and a driving frequency of the panel. ### Claim 7 (depends on 1) The signal processing device according to claim 1, wherein the output interface sets an active period having a second length greater than a first length by adding a period for transmission of the second image frame data to a period for transmission of the first image frame data having the first length. ### Claim 8 (depends on 1) The signal processing device according to claim 1, wherein the output interface sets an active period having a first length and a blank period having a second length when a resolution of a panel is a first resolution and a driving frequency of the panel is a first frequency, and when the first image frame data and the second image frame data are output, transmits at least a part of the first image frame data in the active period having the first length and transmits at least a part of the second image frame data in a part of the blank period having the second length. ### Claim 9 (depends on 1) The signal processing device according to claim 1, wherein the output interface includes a first output terminal for transmitting vertical synchronization signal, a second output terminal for transmitting horizontal synchronization signal, a third output terminal for transmission of a data signal of first image frame data, a fourth output terminal for transmission of a data enable signal of the first image frame data, a fifth output terminal for transmission of a data signal of second image frame data, and a sixth output terminal for transmission of a data enable signal of the second image frame data, wherein the output interface outputs the first image frame data and the second image frame data using different output terminals. ### Claim 10 (depends on 1) The signal processing device according to claim 1, wherein the output interface outputs first image frame data regarding an n image frame and second image frame data regarding an n image frame together or does not output the second image frame data when an image output mode is a low delay mode, wherein the low delay mode includes at least one of a game mode or a mirroring mode. ### Claim 11 (depends on 1) The signal processing device according to claim 1, wherein the second image processor includes a scaler for generating second image frame data scaled down from the first image frame data based on the image signal, wherein the scaler generates at least one super pixel or super block based on an image block of the image signal and outputs the scaled down second image frame data including the super pixel or the super block, wherein the scaler changes a size of the super pixel or the super block according to a resolution of the image signal or an image size. ### Claim 12 A signal processing device comprising: an input interface configured to receive an image signal; a first image processor configured to generate first image frame data based on the image signal; a second image processor configured to generate second image frame data based on the image signal; and an output interface configured to output a data enable signal divided into active periods and blank periods, a data signal of the first image frame data, and a data signal of the second image frame data, wherein the output interface sets an active period of a first data enable signal to a first length when only the data signal of the first image frame data is output and sets an active period of a second data enable signal to a second length greater than the first length when the data signal of the first image frame data and the data signal of the second image frame data are output together. ### Claim 13 (depends on 12) The signal processing device according to claim 12, wherein the output interface sets a blank period of the first data enable signal to a third length when only the data signal of the first image frame data is output and sets a blank period of the second data enable signal to a fourth length greater than the third length when the data signal of the first image frame data and the data signal of the second image frame data are output together. ### Claim 14 (depends on 12) The signal processing device according to claim 12, wherein the output interface varies the length of the active period of the second data enable signal based on resolution information of a panel and a driving frequency of the panel. ### Claim 15 An image display apparatus comprising: a signal processing device; a timing controller configured to perform signal processing based on an image signal output from the signal processing device; and a panel configured to display an image based on a signal from the timing controller, wherein the signal processing device comprises: an input interface configured to receive an image signal; a first image processor configured to generate first image frame data based on the image signal; a second image processor configured to generate second image frame data scaled down from the first image frame data based on the image signal; and an output interface configured to receive the first image frame data from the first image processor and the second image frame data from the second image processor and to output the first image frame data and the second image frame data, wherein the first image frame data output from the output interface is more delayed than the second image frame data output from the output interface, wherein the output interface outputs a data enable signal divided into active periods and blank periods, wherein a second active period of a second data enable signal when the first image frame data and the second image frame data are output is greater than a first active period of a first data enable signal when only the first image frame data is output. ### Claim 16 (depends on 15) The image display apparatus according to claim 15, wherein the timing controller extracts the first image frame data based on the second image frame data from the signal processing device, performs signal processing on the first image frame data based on the extracted information, and outputs a signal regarding the processed first image frame data to the panel. ### Claim 17 (depends on 15) The image display apparatus according to claim 15, wherein the timing controller extracts the first image frame data based on the second image frame data from the signal processing device, decreases a luminance level of the first image frame data from a first level to a second level when power information based on luminance information in the extracted information exceeds a reference value, and outputs a signal regarding the first image frame data with the luminance changed to the second level to the panel. ### Claim 18 (depends on 15) The image display apparatus according to claim 15, wherein, when power information according to luminance information regarding a part of the first image frame data exceeds a reference value based on extracted information, the timing controller decreases a luminance level of the part of the first image frame data from a first level to a second level and outputs a signal regarding the part of the first image frame data having the luminance changed to the second level to the panel. ### Claim 19 (depends on 15) The image display apparatus according to claim 15, wherein the timing controller receives the first image frame data and the second image frame data when an image output mode of the signal processing device is a first mode, performs signal processing on the first image frame data based on the second image frame data to control the processed first image frame data to be displayed on the panel, and performs signal processing on the received first image frame data without information regarding the second image frame data to control the processed first image frame data to be displayed on the panel when the image output mode of the signal processing device is a second mode.