# US 11,308,387 B2 · STDP with synaptic fatigue for learning of spike-time-coded patterns in the presence of parallel rate-coding

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- Number: US 11,308,387 B2
- Document ID: US11308387B2
- Status: Granted
- Kind: B2
- Application number: 15/590,530
- Filed: 2017-05-09
- Published: 2018-11-15
- Granted: 2022-04-19
- Earliest claimed: 2017-05-09
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Wabe W. Koelmans; Timoleon Moraitis; Abu Sebastian; Tomas Tuma
- Web page: https://patentgrep.com/patent/US11308387B2

## CPC

- G06N 3/063: using electronic means
- G06N 3/049: Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
- G06N 3/088: Non-supervised learning, e.g. competitive learning
- G11C 11/54: using elements simulating biological cells, e.g. neuron
- G11C 13/0004: {comprising amorphous/crystalline phase transition cells}
- G11C 2013/0071: {Write using write potential applied to access device gate}
- G11C 2213/79: Array wherein the access device being a transistor
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner. In some embodiments, the Hebbian plasticity is a spike-timing-dependent plasticity (STDP), resulting in a fatiguing STDP (FSTDP) synapse.

## Claims

### Claim 1

An apparatus comprising:
circuitry comprising:
at least one presynaptic artificial neuron configured to generate a sequence of presynaptic spikes each having a respective timing;
a postsynaptic artificial neuron comprising a membrane potential; and
a learning rule circuit, comprising a synaptic efficacy and a synaptic plasticity, configured to
learn temporal correlations in the respective timing of the presynaptic spikes by discounting, using a rate-normalized covariance matrix, correlations in spike rates associated with the sequence of presynaptic spikes in the learning, the discounting including modifying the synaptic efficacy for clusters, in the rate-normalized covariance matrix, having covarying frequency higher than a preset threshold, using a learning rule based on a result of the learning,
wherein the learning rule is based on the respective timing.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the learning rule circuit comprises a normalized covariance circuit configured to generate the rate-normalized covariance matrix based on the sequence of presynaptic spikes and a clustering circuit configured to detect the clusters, of a portion of the sequence of presynaptic spikes, in the normalized covariance matrix and modify the synaptic efficacy according to the detected clusters in the normalized covariance matrix.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the learning rule circuit comprises at least one plastic synapse that is operatively connected to the at least one presynaptic artificial neuron to receive the sequence of presynaptic spikes and modify the postsynaptic membrane potential based on the synaptic efficacy and the sequence of presynaptic spikes.

### Claim 4 (depends on 3)

The apparatus of claim 3, wherein the synaptic efficacy comprises a weighting and a rate normalization, and wherein the at least one plastic synapse comprises a Hebbian plasticity circuit configured to modify the weighting, and a rate-dependent plasticity circuit configured to modify the rate normalization.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the Hebbian plasticity circuit comprises a spike-timing-dependent plasticity rule and the rate-dependent plasticity circuit comprises a fatigue plasticity rule.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein
the sequence of presynaptic spikes is characterized by the spike rates, and
the rate-dependent plasticity circuit, using a fatigue plasticity rule, is configured to modify the rate normalization so that each spike in the sequence of presynaptic spikes has a reduced effect on the membrane potential when the spike rates increase.

### Claim 7 (depends on 3)

The apparatus of claim 3, wherein the at least one plastic synapse comprises a non-volatile memory element with volatile characteristics that match a form of fatigue.

### Claim 8 (depends on 3)

The apparatus of claim 3, wherein the at least one plastic synapse comprises a digital complementary metal-oxide semiconductor (CMOS) circuit or an analog CMOS circuit.

### Claim 9

An apparatus comprising:
circuitry comprising:
at least one presynaptic artificial neuron configured to generate a sequence of presynaptic spikes; and
a postsynaptic artificial neuron comprising:
a postsynaptic membrane potential; and
at least one fatiguing plastic synapse connected to the postsynaptic membrane potential,
wherein the postsynaptic artificial neuron is configured to receive a set of the sequence of presynaptic spikes, and
the at least one fatiguing plastic synapse comprises:
an efficacy having a spike-timing-dependent plasticity; and
a fatiguing circuit,
wherein the fatiguing circuit is configured to reduce the efficacy using a fatigue plasticity rule based on the set of the sequence of presynaptic spikes, by discounting, using a rate-normalized covariance matrix, correlations in a spike rate associated with the sequence of presynaptic spikes in a learning of temporal correlations in a respective timing of the presynaptic spikes, the discounting including modifying the efficacy for clusters, in the rate-normalized covariance matrix, having covarying frequency higher than a preset threshold, based on a result of the learning.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein
the sequence of presynaptic spikes is characterized by the spike rate, and
the fatiguing circuit, using the fatigue plasticity rule, is configured to modify the efficacy so that each spike in the sequence of presynaptic spikes has a reduced effect on the postsynaptic membrane potential when the spike rate increases.

### Claim 11 (depends on 9)

The apparatus of claim 9, wherein the fatigue plasticity rule comprises:
a function:
F(t)=1−1/(R(t)+1),
wherein R(t) is a spike rate at time t.

### Claim 12 (depends on 11)

The apparatus of claim 11, wherein the spike rate comprises a mean over a time window.

### Claim 13 (depends on 9)

The apparatus of claim 9, wherein the fatiguing plasticity rule comprises:
a function:
F(t)=ƒ(t−tspn)+F(tspn),
wherein f(x) is a decreasing function, tspn is a timing of the last presynaptic spike prior to t, F(t) is a function that depends on a time of arrival of the presynaptic spikes.

### Claim 14 (depends on 13)

The apparatus of claim 13, wherein:
f
⁡
(
x
)
=
{
a
,
0
<
x
<
x
window
0
,
x
≥
x
window
,
a
∈
(
0
,
1
]
.

### Claim 15 (depends on 13)

The apparatus of claim 13, wherein:
ƒ(x)=1−ax, a>0 or ƒ(x)=1−ae−x, a>0.

### Claim 16 (depends on 9)

The apparatus of claim 9, wherein the plastic synapse comprises a transistor having a gate input, wherein the set of presynaptic spikes are input into the gate so as to modify an amount of current passing through the transistor.

### Claim 17 (depends on 16)

The apparatus of claim 16, wherein the modifying the amount of current passing through the transistor is in accordance with a fatigue rule.

### Claim 18 (depends on 9)

The apparatus of claim 9, wherein the plastic synapse comprises a non-volatile memory element with volatile characteristics that match a form of fatigue.

### Claim 19 (depends on 9)

The apparatus of claim 9, wherein the plastic synapse comprises a digital complementary metal-oxide semiconductor (CMOS) circuit or an analog CMOS circuit.

### Claim 20

An apparatus comprising:
circuitry comprising:
at least one presynaptic artificial neuron configured to generate a sequence of presynaptic spikes;
a postsynaptic artificial neuron comprising:
a postsynaptic membrane potential; and
at least one plastic synapse circuit configured to receive a set of the sequence of presynaptic spikes; and
a learning rule circuit configured to:
learn temporal correlations in a respective timing of the presynaptic spikes by discounting, using a rate-normalized covariance matrix, correlations in spike rates associated with the sequence of presynaptic spikes in the learning, the discounting including modifying the postsynaptic membrane potential for clusters, in the rate-normalized covariance matrix, having covarying frequency higher than a preset threshold, using a result of learning based on a normalized covariance of the sequence of presynaptic spikes.