# US 11,308,225 B2 · Management of keys for use in cryptographic computing

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- Number: US 11,308,225 B2
- Document ID: US11308225B2
- Status: Granted
- Kind: B2
- Application number: 16/723,927
- Filed: 2019-12-20
- Published: 2020-05-07
- Granted: 2022-04-19
- Earliest claimed: 2019-06-29
- Assignees: Intel Corporation
- Applicants: Intel Corporation
- Inventors: Michael E. Kounavis; Santosh Ghosh; Sergej Deutsch; David M. Durham
- Web page: https://patentgrep.com/patent/US11308225B2

## CPC

- G06F 21/602: {Providing cryptographic facilities or services}
- H04L 9/32: including means for verifying the identity or authority of a user of the system {or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials}
- G06F 9/30043: {LOAD or STORE instructions; Clear instruction}
- G06F 9/30101: {Special purpose registers}
- G06F 9/30178: {of compressed or encrypted instructions}
- G06F 9/321: {Program or instruction counter, e.g. incrementing}
- G06F 9/45558: {Hypervisor-specific management and integration aspects}
- G06F 9/48: Program initiating; Program switching, e.g. by interrupt
- G06F 9/5016: {the resource being the memory}
- G06F 12/0207: {with multidimensional access, e.g. row/column, matrix}
- G06F 12/0646: {Configuration or reconfiguration}
- G06F 12/0811: with multilevel cache hierarchies
- G06F 12/0875: with dedicated cache, e.g. instruction or stack
- G06F 12/0897: with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811)
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 12/1458: {by checking the subject access rights}
- G06F 12/1466: {Key-lock mechanism}
- G06F 12/1475: {in a virtual system, e.g. with translation means}
- G06F 21/12: Protecting executable software
- G06F 21/54: by adding security routines or objects to programs
- G06F 21/6227: {where protection concerns the structure of data, e.g. records, types, queries}
- G06F 21/64: Protecting data integrity, e.g. using checksums, certificates or signatures
- G06F 21/72: in cryptographic circuits
- G06F 21/78: to assure secure storage of data (address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00)
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- H04L 9/0631: {Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms}
- H04L 9/0637: {Modes of operation, e.g. cipher block chaining [CBC], electronic codebook [ECB] or Galois/counter mode [GCM]}
- H04L 9/0822: {using key encryption key}
- H04L 9/0836: {using tree structure or hierarchical structure}
- H04L 9/0861: {Generation of secret information including derivation or calculation of cryptographic keys or passwords}
- H04L 9/0869: {involving random numbers or seeds}
- H04L 9/0894: {Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage}
- H04L 9/14: using a plurality of keys or algorithms
- H04L 9/3242: {involving keyed hash functions, e.g. message authentication codes [MACs], CBC-MAC or HMAC}
- G06F 21/556: {involving covert channels, i.e. data leakage between processes (inhibiting the analysis of circuitry or operation with measures against power attack G06F21/755)}
- G06F 2009/45587: {Isolation or security of virtual machine instances}
- G06F 2212/1032: Reliability improvement, data loss prevention, degraded operation etc
- G06F 2212/1041: Resource optimization
- G06F 2212/1052: Security improvement
- G06F 2212/402: Encrypted data
- G06F 2221/2107: File encryption
- H04L 2209/125: Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A method comprising executing, by a core of a processor, a first instruction requesting access to a parameter associated with data for storage in a main memory coupled to the processor, the first instruction including a reference to the parameter, a reference to a wrapping key, and a reference to an encrypted encryption key, wherein execution of the first instruction comprises decrypting the encrypted encryption key using the wrapping key to generate a decrypted encryption key; requesting transfer of the data between the main memory and the processor core; and performing a cryptographic operation on the parameter using the decrypted encryption key.

## Claims

### Claim 1

A processor comprising:
a plurality of registers; and
a processor core comprising circuitry, the processor core to execute a first instruction requesting access to a parameter associated with data for storage in a main memory coupled to the processor, the first instruction including a reference to the parameter, a reference to a wrapping key, and a reference to an encrypted encryption key, wherein execution of the first instruction comprises:
decrypting the encrypted encryption key using the wrapping key to generate a decrypted encryption key;
requesting transfer of the data between the main memory and the processor core; and
performing a cryptographic operation on the parameter using the decrypted encryption key.

### Claim 2 (depends on 1)

The processor of claim 1, wherein the parameter comprises at least one of the data, a linear address of the data, a physical address of the data, a software object identifier, and a software object type.

### Claim 3 (depends on 1)

The processor of claim 1, wherein the first instruction comprises a cryptographic store instruction, the parameter comprises plaintext data, the cryptographic operation comprises encryption of the plaintext data to generate the data for storage in the main memory, and requesting transfer of the data comprises requesting transfer, from the processor core to the main memory, of the data for storage in the main memory.

### Claim 4 (depends on 1)

The processor of claim 1, wherein the first instruction comprises a cryptographic load instruction, the parameter comprises encrypted data stored in the main memory, requesting transfer of the data comprises requesting transfer of the encrypted data from the main memory to the processor core, and the cryptographic operation comprises decryption of the encrypted data.

### Claim 5 (depends on 1)

The processor of claim 1, wherein the parameter comprises the data for storage in the main memory and execution of the first instruction further comprises placing the parameter into a register of the plurality of registers.

### Claim 6 (depends on 1)

The processor of claim 1, wherein the parameter comprises an encrypted pointer referencing the data for storage in the main memory.

### Claim 7 (depends on 1)

The processor of claim 1, wherein the plurality of registers comprise a plurality of data registers and a plurality of registers dedicated to storing cryptographic keys, and wherein the reference to the wrapping key comprises an identifier of a register of the plurality of registers dedicated to storing cryptographic keys.

### Claim 8 (depends on 7)

The processor of claim 7, wherein the reference to the encrypted encryption key comprises an identifier of a second register of the plurality of registers dedicated to storing cryptographic keys.

### Claim 9 (depends on 1)

The processor of claim 1, wherein the parameter comprises an object identifier of a plurality of object identifiers, the object identifier is associated with the data for storage in the main memory, and the wrapping key comprises a master key used by a parent function to encrypt the plurality of object identifiers to generate a plurality of derived keys to be distributed to a plurality of child functions.

### Claim 10 (depends on 9)

The processor of claim 9, wherein the processor is further to execute an instruction issued by a child function of the plurality of child functions, wherein the instruction issued by the child function includes a reference to a derived key of the plurality of derived keys and a reference to data encrypted by the derived key.

### Claim 11 (depends on 1)

The processor of claim 1, wherein the processor is to implement a hierarchy of encryption keys, wherein a first function having access to a first wrapping key that is a root of a second wrapping key obtains access to data encrypted using an encryption key wrapped by the first wrapping key and data encrypted using a second encryption key wrapped by the second wrapping key and wherein a second function having access to the second wrapping key but not the first wrapping key obtains access to data encrypted using the second encryption key but not data encrypted using the first encryption key.

### Claim 12 (depends on 1)

The processor of claim 1, wherein the processor core is to execute a second instruction, the second instruction including a reference to the wrapping key and a reference to the encryption key, wherein execution of the second instruction comprises:
encrypting the encryption key using the wrapping key to generate the encrypted encryption key; and
outputting the encrypted encryption key.

### Claim 13 (depends on 1)

The processor of claim 1, further comprising one or more of: a battery communicatively coupled to the processor, a display communicatively coupled to the processor, or a network interface communicatively coupled to the processor.

### Claim 14 (depends on 1)

The processor of claim 1, wherein the processor core to execute the first instruction is a first core of a multi-core central processing unit.

### Claim 15

A method comprising:
executing, by a core of a processor, a first instruction requesting access to a parameter associated with data for storage in a main memory coupled to the processor, the first instruction including a reference to the parameter, a reference to a wrapping key, and a reference to an encrypted encryption key, wherein execution of the first instruction comprises:
decrypting the encrypted encryption key using the wrapping key to generate a decrypted encryption key;
requesting transfer of the data between the main memory and the processor core; and
performing a cryptographic operation on the parameter using the decrypted encryption key.

### Claim 16 (depends on 15)

The method of claim 15, wherein the parameter comprises at least one of the data, a linear address of the data, a physical address of the data, a software object identifier, and a software object type.

### Claim 17 (depends on 15)

The method of claim 15, wherein the first instruction comprises a cryptographic store instruction, the parameter comprises plaintext data, the cryptographic operation comprises encryption of the plaintext data to generate the data for storage in the main memory, and requesting transfer of the data comprises requesting transfer, from the processor core to the main memory, of the data for storage in the main memory.

### Claim 18 (depends on 15)

The method of claim 15, wherein the first instruction comprises a cryptographic load instruction, the parameter comprises encrypted data stored in the main memory, requesting transfer of the data comprises requesting transfer of the encrypted data from the main memory to the processor core, and the cryptographic operation comprises decryption of the encrypted data.

### Claim 19

One or more non-transitory computer-readable media with code stored thereon, wherein the code is executable to cause a processor to:
execute a first instruction requesting access to a parameter associated with data for storage in a main memory coupled to the processor, the first instruction including a reference to the parameter, a reference to a wrapping key, and a reference to an encrypted encryption key, wherein execution of the first instruction comprises:
decrypting the encrypted encryption key using the wrapping key to generate a decrypted encryption key;
requesting transfer of the data between the main memory and the processor core; and
performing a cryptographic operation on the parameter using the decrypted encryption key.

### Claim 20 (depends on 19)

The one or more computer-readable media of claim 19, wherein the first instruction comprises a cryptographic store instruction, the parameter comprises plaintext data, the cryptographic operation comprises encryption of the plaintext data to generate the data for storage in the main memory, and requesting transfer of the data comprises requesting transfer, from the processor core to the main memory, of the data for storage in the main memory.

### Claim 21 (depends on 19)

The one or more computer-readable media of claim 19, wherein the first instruction comprises a cryptographic load instruction, the parameter comprises encrypted data stored in the main memory, requesting transfer of the data comprises requesting transfer of the encrypted data from the main memory to the processor core, and the cryptographic operation comprises decryption of the encrypted data.