# US 11,308,023 B2 · Method and system for enhanced SPI communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,308,023 B2 - Document ID: US11308023B2 - Status: Granted - Kind: B2 - Application number: 17/109,315 - Filed: 2020-12-02 - Published: 2021-09-30 - Granted: 2022-04-19 - Earliest claimed: 2020-03-24 - Assignees: Microchip Technology Incorporated - Applicants: Microchip Technology Incorporated - Inventors: Jason Remple; Andrea Panigada; Bogdan Bolocan - Web page: https://patentgrep.com/patent/US11308023B2 ## CPC - G06F 13/4291: {using a clocked protocol} - G06F 9/30101: {Special purpose registers} - G06F 13/362: with centralised access control - G06F 13/374: using a self-select method with individual priority code comparator - G06F 13/4273: {using a clocked protocol} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A slave device includes an SPI bus with a mode detection circuit configured to detect an SPI operating mode that has been applied by a master device. The slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device. ## Claims ### Claim 1 A slave device comprising a serial peripheral interface (SPI) module, further comprising a mode detection circuit configured to detect an SPI operating mode that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device, wherein the mode detection circuit comprises an edge and signal detection circuit receiving a chip select signal and a clock signal from the master device. ### Claim 2 (depends on 1) The slave device according to claim 1, wherein the edge and signal detection circuit evaluates the state of the clock signal when the chip select signal transitions from an asserted state to an idle state. ### Claim 3 (depends on 1) The slave device according to claim 1, wherein a first mode is a functional mode and wherein receiving signals from the master device indicating the first mode control a primary function of the slave device. ### Claim 4 A slave device comprising a serial peripheral interface (SPI) module, further comprising a mode detection circuit configured to detect an SPI operating mode that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device, wherein the slave device is an analog-to-digital converter and the first mode is a conversion mode. ### Claim 5 (depends on 4) The slave device according to claim 4, wherein selecting a first SPI operating mode by the master device triggers a start of at least one conversion of the analog-to-digital converter. ### Claim 6 A slave device comprising a serial peripheral interface (SPI) module, further comprising a mode detection circuit configured to detect an SPI operating mode that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device, wherein a second mode is a command mode that allows configuration of the slave device and access to registers of the slave device. ### Claim 7 (depends on 6) The slave device according to claim 6, wherein after identifying the second mode by the slave device, the slave device is configured to expect a command on a data in signal line. ### Claim 8 (depends on 6) The slave device according to claim 6, wherein the slave device is further configurable to operate in a Single mode or a Daisy-Chain mode, wherein a mode switch is performed through a dedicated command. ### Claim 9 (depends on 8) The slave device according to claim 8, wherein a received command is evaluated by the slave device as soon as a last bit of the command is received when in Single mode and wherein in Daisy-Chain mode a received command is evaluated by the slave device only after de-assertion of a chip select signal. ### Claim 10 A slave device comprising a serial peripheral interface (SPI) module, further comprising a mode detection circuit configured to detect an SPI operating mode that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device, wherein the slave device is further configurable to operate in a third mode through a logic state on a data output line of the master device, wherein the third mode is a command mode in a Daisy-Chain mode. ### Claim 11 A system comprising a master device and a plurality of slave devices coupled in daisy-chain topology with a serial peripheral interface (SPI) module of the master device, wherein each slave device comprises an SPI module and further comprises a mode detection circuit configured to detect an SPI operating mode that has been applied by the master device, wherein each slave device is configurable to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device through a clock signal and a chip select signal. ### Claim 12 (depends on 11) The system according to claim 11, wherein a first mode is a functional mode wherein a primary function of the slave device is performed and wherein a second mode is a command mode that allows configuration of the slave device and access to registers of the slave device. ### Claim 13 (depends on 12) The system according to claim 12, wherein a dedicated command received by a slave device in command mode causes the device to enter a Daisy-Chain mode. ### Claim 14 (depends on 12) The system according to claim 12, wherein when in Daisy-Chain mode, each slave device only evaluates a received command if the master de-asserts the chip select signal while remaining in command mode. ### Claim 15 A method of operating a slave device coupled with a master device through a serial peripheral interface (SPI) module, the method comprising: detecting an SPI operating mode by the slave device that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode, by receiving and analyzing a chip select signal and a clock signal from the master device to determine whether said first or second mode has been applied; and operating the slave device in the first or second mode depending on the detection of the SPI operating mode as applied by the master device. ### Claim 16 (depends on 15) The method according to claim 15, wherein the state of the clock signal is evaluated when the chip select signal transitions from an asserted state to an idle state. ### Claim 17 A method of operating a slave device coupled with a master device through a serial peripheral interface (SPI) module, the method comprising: detecting and SPI operating mode by the slave device that has been applied by a master device, wherein the slave device is configurable to operate in a first or a second mode, and operating the slave device in the first or second mode depending on the detection of the SPI operating mode as applied by the master device, wherein a first mode is a functional mode wherein a primary function of the slave device is performed and wherein a second mode is a command mode that allows configuration of the slave device and access to registers of the slave device. ### Claim 18 (depends on 17) The method according to claim 17, further comprising: configuring the slave device to operate in a Single mode or a Daisy-Chain mode, wherein a mode switch is performed through a dedicated command received during a command mode. ### Claim 19 A method for operating a system comprising a master device and a plurality of slave devices coupled in daisy-chain topology with a serial peripheral interface (SPI) module of the master device, wherein each slave device comprises an SPI module and further comprises a mode detection circuit configured to detect an SPI operating mode that has been applied by the master device, the method comprising: sending signals through the SPI module by the master device that indicate a selected SPI operating mode; and receiving in Daisy-Chain fashion by each slave device said signals and determining by each slave device to operate in a first or a second mode depending on the detection of the SPI operating mode as applied by the master device. ### Claim 20 (depends on 19) The method according to claim 19, wherein a dedicated command received by a slave device in command mode causes the device to enter a Daisy-Chain mode. ### Claim 21 (depends on 19) The method according to claim 19, wherein when in Daisy-Chain mode, each slave device only evaluates a received command if the master de-asserts a chip select signal while remaining in command mode.