# US 11,307,773 B1 · Memory-based power stabilization in a network device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,307,773 B1 - Document ID: US11307773B1 - Status: Granted - Kind: B1 - Application number: 16/374,530 - Filed: 2019-04-03 - Granted: 2022-04-19 - Earliest claimed: 2018-05-02 - Assignees: Innovium, Inc. - Applicants: Innovium, Inc. - Inventors: Keith Michael Ring; Mohammad Kamel Issa - Web page: https://patentgrep.com/patent/US11307773B1 ## CPC - G06F 3/0614: {Improving the reliability of storage systems} - G06F 1/324: by lowering clock frequency - G06F 1/329: by task scheduling - G06F 3/0604: {Improving or facilitating administration, e.g. storage management} - G06F 3/0653: {Monitoring storage devices or systems} - G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling} - G06F 3/0673: {Single storage device} - G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} - G11C 15/04: using semiconductor elements - G11C 29/38: Response verification devices - H03K 5/135: by the use of time reference signals, e.g. clock signals - H04L 67/1097: for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS] - G06F 3/0625: {Power saving in storage systems} - H03K 2005/00019: {Variable delay} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract According to an embodiment, power demands of a computing device or component thereof may be stabilized by performing redundant operations during periods of otherwise low power demand. In so doing, the current load of the device/component remains relatively stable, potentially greatly reducing voltage droops and overshoots. This can reduce the peak voltage and peak power rating of the device/component. In certain embodiments, such as in network switches and routers, the redundant operations may include queries against a content addressable memory (CAM), such as a ternary content addressable memory (TCAM). Moreover, in an embodiment the queries may be designed to always, or at least be highly likely to, miss the entries in the CAM, thereby ensuring maximum power usage. In another embodiment, the redundant operations include read operations on a random access memory (RAM). In other embodiments, redundant operations may be performed with respect to other power-intensive subsystems. ## Claims ### Claim 1 A network switching apparatus implemented by an integrated circuit, the network switching apparatus comprising: a ternary content addressable memory; a plurality of subsystems, including forwarding logic, traffic management logic, packet manipulation logic, and prefix table lookup logic, configured to process network communications received via one or more ingress ports, the plurality of subsystems configured to determine how to handle the network communications at least partially based on results from querying the ternary content addressable memory for network-related data; a power stabilization subsystem configured to monitor use of the plurality of subsystems and the ternary content addressable memory and, at times when an activity level of the plurality of subsystems falls below a threshold level, when the plurality of subsystems are not querying the ternary content addressable memory, issue redundant queries to the ternary content addressable memory. ### Claim 2 (depends on 1) The network switching apparatus of claim 1, further comprising: a voltage regulator configured to supply power to the integrated circuit comprising the plurality of subsystems, the voltage regulator increasing the power supplied to the integrated circuit in response to detecting a drop in voltage of the supplied power, the voltage regulator decreasing the power supplied to the integrated circuit in response to detecting a spike in the voltage of the supplied power; wherein the power stabilization subsystem is configured to maintain a desired amount of power consumed by the network switching apparatus by issuing the redundant queries at the times when the activity level is below the threshold level, thereby reducing voltage spike magnitudes in the integrated circuit. ### Claim 3 (depends on 1) The network switching apparatus of claim 1, wherein the ternary content addressable memory stores a prefix table. ### Claim 4 (depends on 1) The network switching apparatus of claim 1, wherein the redundant queries are for a value or values that are at least highly likely to miss the ternary content addressable memory. ### Claim 5 (depends on 1) The network switching apparatus of claim 1, wherein each entry of the ternary content addressable memory includes a redundant field set to a first value, wherein the redundant queries set the redundant field to a different value than the first value. ### Claim 6 (depends on 1) The network switching apparatus of claim 1, wherein results of the redundant queries are discarded without further processing. ### Claim 7 (depends on 1) The network switching apparatus of claim 1, wherein the power stabilization subsystem is configured to ensure that at least one query is processed by the ternary content addressable memory within each given time period of a plurality of successive time periods in which the network switching apparatus is in operation. ### Claim 8 (depends on 1) The network switching apparatus of claim 1, further comprising multiple ternary content addressable memories, each storing a different set of network-related data, wherein the power stabilization subsystem is configured to monitor and issue redundant queries to each of the multiple ternary content addressable memories, the number of the multiple ternary content addressable memories to which the power stabilization subsystem issues the redundant queries being a function of the activity level. ### Claim 9 (depends on 1) The network switching apparatus of claim 1, further comprising: a static random access memory storing network packet buffers, the static random access memories being different from the ternary content addressable memory; wherein the power stabilization subsystem is further configured to monitor use of the static random access memory in a pipeline of upcoming operations, and issue redundant read operations to the static random access memory based on an activity level of the static random access memory indicated by the pipeline. ### Claim 10 (depends on 1) The network switching apparatus of claim 1, wherein the network switching apparatus comprises a plurality of integrated circuits, including the integrated circuit, wherein the integrated circuit is an ASIC or FPGA. ### Claim 11 A method for reducing voltage transients in a network switching apparatus implemented by an integrated circuit, the method comprising: monitoring use of a ternary content addressable memory and a plurality of subsystems in the network switching apparatus, the plurality of subsystems configured to determine how to handle network communications received by the network switching apparatus at least partially based on results from querying the ternary content addressable memory for network-related data, the plurality of subsystems including forwarding logic, traffic management logic, packet manipulation logic, and prefix table lookup logic; based on the monitoring, determining an activity level of the plurality of subsystems; determining times when the activity of the level of the plurality of subsystems falls below a threshold level and the plurality of subsystems is not querying the ternary content addressable memory; issuing redundant queries to the ternary content addressable memory at the determined times. ### Claim 12 (depends on 11) The method of claim 11, further comprising, at the plurality of subsystems: receiving data packets at forwarding logic within the plurality of subsystems; querying a prefix table in the ternary content addressable memory for data indicating forwarding instructions mapped to longest prefix matches for destination addresses specified by the data packets; ignoring results of the redundant queries to the ternary content addressable memory. ### Claim 13 (depends on 12) The method of claim 12, wherein the redundant queries are for a value or values that are guaranteed to require accessing at least a majority of prefix entries in the prefix table. ### Claim 14 (depends on 12) The method of claim 12, further comprising storing, in each entry of the prefix table, a redundant field, the redundant field being set to a first value for each entry in the prefix table, wherein queries to the prefix table for the data indicating the forwarding instructions set the redundant field to the first value, wherein the redundant queries set the redundant field to the second value. ### Claim 15 (depends on 12) The method of claim 12, further comprising, by the monitoring, determining, and issuing, ensuring that, over a plurality of time periods, any given interval of time or clock cycles between the ternary content addressable memory processing queries does not exceed a certain size, the certain size being an amount of time or clock cycles after which the ternary content addressable memory will begin drawing less current if idle. ### Claim 16 (depends on 11) The method of claim 11, further comprising performing the monitoring, determining, and issuing with respect to multiple ternary content addressable memories, each storing a different set of network-related data. ### Claim 17 (depends on 11) The method of claim 11, further comprising: storing data in a static random access memory; monitoring use of the static random access memory in a pipeline of upcoming operations; issuing redundant read operations to the static random access memory based on the activity level of the static random access memory indicated by the pipeline. ### Claim 18 (depends on 11) The method of claim 11, wherein the ternary content addressable memory and the plurality of subsystems are all components of a same integrated circuit. ### Claim 19 One or more non-transitory computer readable media storing instructions for reducing voltage transients in a network switching apparatus implemented by an integrated circuit, wherein the instructions, when executed by the network switching apparatus, cause performance of: monitoring use of a ternary content addressable memory and a plurality of subsystems in the network switching apparatus, the plurality of subsystems configured to determine how to handle network communications received by the network switching apparatus at least partially based on results from querying the ternary content addressable memory for network-related data, the plurality of subsystems including forwarding logic, traffic management logic, packet manipulation logic, and prefix table lookup logic; based on the monitoring, determining an activity level of the plurality of subsystems; determining times when the activity of the level of the plurality of subsystems falls below a threshold level and the plurality of subsystems is not querying the ternary content addressable memory; issuing redundant queries to the ternary content addressable memory at the determined times. ### Claim 20 (depends on 17) The one or more non-transitory computer readable media of claim 17, wherein the instructions, when executed by the network switching apparatus, further cause performance of: receiving data packets at forwarding logic within the plurality of subsystems; querying a prefix table in the ternary content addressable memory for data indicating forwarding instructions mapped to longest prefix matches for destination addresses specified by the data packets; ignoring results of the redundant queries to the ternary content addressable memory.