# US 11,307,642 B2 · Method for managing power supply state of memory and chip

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- Number: US 11,307,642 B2
- Document ID: US11307642B2
- Status: Granted
- Kind: B2
- Application number: 17/134,148
- Filed: 2020-12-24
- Published: 2021-06-24
- Granted: 2022-04-19
- Earliest claimed: 2019-12-18
- Assignees: Shenzhen Goodix Technology Co., Ltd.
- Applicants: Shenzhen Goodix Technology Co., Ltd.
- Inventors: Nan Zou
- Web page: https://patentgrep.com/patent/US11307642B2

## CPC

- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 1/3225: of memory devices
- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G11C 5/14: Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels}
- G11C 11/417: for memory cells of the field-effect type
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Embodiments of this application disclose a method for managing a power supply state of a memory and a chip, where the memory includes a plurality of storage areas, and the plurality of storage areas are separately powered by an independent power supply. The method includes: determining an occupancy condition of the plurality of storage areas by a program according to allocation address information of a segment, in the program, to be stored in the plurality of storage areas; and configuring a power supply state of the plurality of storage areas according to the occupancy condition of the plurality of storage areas by the program.

## Claims

### Claim 1

A method for managing a power supply state of a memory, wherein the memory comprises a plurality of storage areas, the plurality of storage areas are separately powered by an independent power supply, and the method comprises:
determining an occupancy condition of the plurality of storage areas by a program according to allocation address information of a segment, in the program, to be stored in the plurality of storage areas; and
configuring a power supply state of the plurality of storage areas according to the occupancy condition of the plurality of storage areas by the program;
wherein the method further comprises:
obtaining a link script file of the program; and
obtaining the allocation address information of the segment according to the link script file.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the allocation address information comprises at least one of the following: a start address, a length, an end address, and an index of a storage area.

### Claim 3 (depends on 2)

The method according to claim 2, wherein the segment comprises a segment a, and
when the allocation address information includes information about the start address, and a start address of the segment a belongs to an address of a storage area 1, a power supply corresponding to the storage area 1 can be turned on, so that the storage area 1 is in a power-on mode; or
when the allocation address information includes information about the start address and the length of storage, a storage space occupied by the segment a as a whole in the memory can be determined based on a start address and a length of the segment a, so that specific storage areas whose power supply need to be turned on can be determined; or
when the allocation address information includes information about the end address and an end address of the segment a belongs to an address of a storage area 2, a power supply corresponding to the storage area 2 can be turned on; or
when the allocation address information includes information about the end address and the length of storage, a storage space occupied by the segment a as a whole in the memory can be determined according to an end address and the length of the segment a, so that specific storage areas whose power supply need to be turned on can be determined; or
when the allocation address information includes the index of the storage area, a power supply of a corresponding storage area can be turned on directly according to the index of the storage area.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the segment of the program comprises at least one of the following: a code segment, a zero (ZI) segment, a read/write (RW) segment, a read only (RO) segment, a stack space segment, and a heap space segment.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the method further comprises:
determining the segment, in the program, to be stored in the plurality of storage areas.

### Claim 6 (depends on 1)

The method according to claim 1, wherein the link script file be obtained through the link process.

### Claim 7 (depends on 1)

The method according to claim 1, wherein the configuring a power supply state of the plurality of storage areas according to the occupancy condition of the plurality of storage areas by the program comprises:
configuring an occupied storage area to a power-on mode; and/or,
configuring an unoccupied storage area to a power-off mode.

### Claim 8 (depends on 7)

The method according to claim 7, wherein before occupancy conditions of a plurality of storage areas by a plurality of segments are determined, whether the plurality of segments are stored or run in the memory is determined.

### Claim 9 (depends on 1)

The method according to claim 1, wherein the memory is a static random access memory (SRAM).

### Claim 10

A chip, comprising:
a memory, comprising a plurality of storage areas, wherein the plurality of storage areas are separately powered by an independent power supply; and
a processor, configured to: determine an occupancy condition of the plurality of storage areas by a program according to allocation address information of a segment, in the program, to be stored in the plurality of storage areas; and configure a power supply state of the plurality of storage areas according to the occupancy condition of the plurality of storage areas by the program;
wherein the processor is configured to: obtain a link script file of the program; and obtain the allocation address information of the segment according to the link script file.

### Claim 11 (depends on 10)

The chip according to claim 10, wherein the allocation address information comprises at least one of the following: a start address, a length, an end address, and an index of a storage area.

### Claim 12 (depends on 11)

The chip according to claim 11, wherein the segment comprises a segment a, and
when the allocation address information includes information about the start address, and a start address of the segment a belongs to an address of a storage area 1, a power supply corresponding to the storage area 1 can be turned on, so that the storage area 1 is in a power-on mode; or
when the allocation address information includes information about the start address and the length of storage, a storage space occupied by the segment a as a whole in the memory can be determined based on a start address and a length of the segment a, so that specific storage areas whose power supply need to be turned on can be determined; or
when the allocation address information includes information about the end address and an end address of the segment a belongs to an address of a storage area 2, a power supply corresponding to the storage area 2 can be turned on; or
when the allocation address information includes information about the end address and the length of storage, a storage space occupied by the segment a as a whole in the memory can be determined according to an end address and the length of the segment a, so that specific storage areas whose power supply need to be turned on can be determined; or
when the allocation address information includes the index of the storage area, a power supply of a corresponding storage area can be turned on directly according to the index of the storage area.

### Claim 13 (depends on 10)

The chip according to claim 10, wherein the segment of the program comprises at least one of the following: a code segment, a zero (ZI) segment, a read/write (RW) segment, a read only (RO) segment, a stack space segment, and a heap space segment.

### Claim 14 (depends on 10)

The chip according to claim 10, wherein the processor is configured to determine the segment, in the program, to be stored in the plurality of storage areas.

### Claim 15 (depends on 10)

The chip according to claim 10, wherein the link script file be obtained through the link process.

### Claim 16 (depends on 10)

The chip according to claim 10, wherein the processor is configured to: configure an occupied storage area to a power-on mode; and/or configure an unoccupied storage area to a power-off mode.

### Claim 17 (depends on 16)

The chip according to claim 16, wherein before occupancy conditions of a plurality of storage areas by a plurality of segments are determined, whether the plurality of segments are stored or run in the memory is determined.

### Claim 18 (depends on 10)

The chip according to claim 10, wherein the memory is a static random access memory (SRAM).
