# US 11,307,636 B2 · Semiconductor storing apparatus and flash memory operation method

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- Number: US 11,307,636 B2
- Document ID: US11307636B2
- Status: Granted
- Kind: B2
- Application number: 16/882,772
- Filed: 2020-05-26
- Published: 2021-12-02
- Granted: 2022-04-19
- Earliest claimed: 2020-05-26
- Assignees: Winbond Electronics Corp.
- Applicants: Winbond Electronics Corp.
- Inventors: Naoaki Sudo
- Web page: https://patentgrep.com/patent/US11307636B2

## CPC

- G06F 1/3275: {Power saving in memory, e.g. RAM, cache}
- G11C 2207/2227: Standby or low power modes
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- Y02D 30/50: in wire-line communication networks, e.g. low power modes or reduced link rate
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A flash memory capable of automatically releasing a deep power-down mode is provided. The flash memory includes: a standard command interface (I/F) circuit and a deep power-down mode (DPD) controller, operating through an external power voltage; and an internal circuit, operating through internal voltages supplied from voltage supply nodes. The DPD controller detects whether the flash memory is in the deep power-down mode when a standard command is inputted to the standard command I/F circuit and recovers the internal circuit from the DPD mode in the case where the deep power-down mode is detected. The standard command is executed after the internal circuit is recovered.

## Claims

### Claim 1

A flash memory operation method, comprising:
a step of detecting whether a flash memory is in a deep power-down mode blocking power supply to a specific circuit in response to input of a standard command comprising reading, programming, or erasing;
a step of releasing the specific circuit from the deep power-down mode according to a type of the standard command in response to detection of the deep power-down mode under input of the standard command; and
a step of executing the standard command after the specific circuit is restored.

### Claim 2 (depends on 1)

The flash memory operation method according to claim 1, wherein
in a case where the deep power-down mode is not detected, the inputted standard command is executed.

### Claim 3 (depends on 1)

The flash memory operation method according to claim 1, wherein
the step of releasing comprises: turning on a switching transistor connected between a power voltage and the specific circuit.

### Claim 4 (depends on 1)

The flash memory operation method according to claim 1, wherein,
the deep power-down mode transitions from a stand-by mode and further reduces power consumption in the stand-by mode.

### Claim 5

A semiconductor storing apparatus, comprising:
a peripheral circuit; and
a deep power-down mode controller, configured to:
detect whether a flash memory is in a deep power-down mode blocking power supply to one or more specific circuits of the peripheral circuit in response to input of a standard command comprising reading, programming, or erasing from an outside;
release a specific circuit from the deep power-down mode according to a type of the standard command in response to detection of the deep power-down mode under input of the standard command; and
execute the standard command after the specific circuit is restored.

### Claim 6 (depends on 5)

The semiconductor storing apparatus according to claim 5, wherein
in a case where the deep power-down mode is not detected, the standard command is executed.

### Claim 7 (depends on 6)

The semiconductor storing apparatus according to claim 6, wherein
the semiconductor storing apparatus is a flash memory.

### Claim 8 (depends on 5)

The semiconductor storing apparatus according to claim 5, wherein,
the deep power-down mode controller comprises a plurality of switching transistors respectively connected between an external power voltage and a plurality of specific circuits, and the deep power-down mode controller turns on any one of the plurality of switching transistors.

### Claim 9 (depends on 8)

The semiconductor storing apparatus according to claim 8, wherein
the semiconductor storing apparatus is a flash memory.

### Claim 10 (depends on 5)

The semiconductor storing apparatus according to claim 5, wherein
the semiconductor storing apparatus is a flash memory.