# US 11,307,608 B2 · Integrated circuit and electronic device for controlling function modules in low-power state according to operation state, and control method therefor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,307,608 B2 - Document ID: US11307608B2 - Status: Granted - Kind: B2 - Application number: 16/971,049 - Filed: 2019-03-05 - Published: 2021-03-25 - Granted: 2022-04-19 - Earliest claimed: 2018-03-05 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Minwoo Song; Younghyun Ban; Juyoung Lim; Chulmin Lee - Web page: https://patentgrep.com/patent/US11307608B2 ## CPC - G06F 1/10: Distribution of clock signals {, e.g. skew} - G06F 1/06: Clock generators producing several clock signals {(G06F1/08 - G06F1/14 take precedence)} - G06F 1/3287: by switching off individual functional units in the computer system - H03K 5/00006: {Changing the frequency (modulating pulses H03K7/00; frequency dividers H03K21/00 - H03K29/00; additive or subtractive mixing of two pulse rates into one G06F7/605; pulse rate dividers G06F7/68)} - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - Y02D 30/50: in wire-line communication networks, e.g. low power modes or reduced link rate - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Disclosed are an integrated circuit for controlling function modules to a low-power status depending on an operating status, an electronic device, and a control method thereof. An integrated circuit includes at least one clock generator, a clock distribution circuit that distributes a clock generated by the at least one clock generator, a plurality of function modules that receive the clock distributed by the clock distribution circuit, a monitoring circuit that monitors operating statuses of the at least one clock generator and the clock distribution circuit, a memory, and at least one control circuit. When the operating statuses of the at least one clock generator and the clock distribution circuit monitored by the monitoring circuit correspond to a specified operating status, the at least one control circuit is configured to control at least one of at least one function module of the plurality of function modules, the at least one clock generator, or the clock distribution circuit based on a specified control method. Moreover, various embodiment found through the disclosure are possible. ## Claims ### Claim 1 An integrated circuit comprising: at least one clock generator; a clock distribution circuit configured to distribute a clock generated by the at least one clock generator; a plurality of function modules configured to receive the clock distributed by the clock distribution circuit; a monitoring circuit configured to monitor operating statuses of the at least one clock generator and the clock distribution circuit; a memory; and at least one control circuit, wherein the at least one control circuit is configured to: when the operating statuses of the at least one clock generator and the clock distribution circuit monitored by the monitoring circuit correspond to a specified operating status, control at least one of at least one function module of the plurality of function modules, the at least one clock generator, or the clock distribution circuit based on a specified control method, and turn on or off one or more function modules specified in advance from among the plurality of function modules based on the specified control method. ### Claim 2 (depends on 1) The integrated circuit of claim 1, wherein the clock distribution circuit includes at least one multiplexer, at least one divider, and a plurality of clock gates. ### Claim 3 (depends on 2) The integrated circuit of claim 2, wherein the operating status of the at least one clock generator includes whether the at least one clock generator operates, and the operating status of the clock distribution circuit includes information about selection of the multiplexer, a clock division ratio of the divider, and whether the clock gate is enabled. ### Claim 4 (depends on 3) The integrated circuit of claim 3, wherein the operating status of the at least one clock generator further includes a time during which the at least one clock generator operates, and the operating status of the clock distribution circuit further includes a time during which the multiplexer, the divider, and the clock gate operate in a current status. ### Claim 5 (depends on 1) The integrated circuit of claim 1, wherein the monitoring circuit includes: sub monitoring circuits configured to monitor operating statuses of the at least one clock generator and components included in the clock distribution circuit, respectively; and a main monitoring circuit configured to receive information about the operating statuses of the at least one clock generator and the components included in the clock distribution circuit from the sub monitoring circuits. ### Claim 6 (depends on 1) The integrated circuit of claim 1, wherein the memory is configured to: store a mapping table including a specified control method according to the operating statuses of the at least one clock generator and the clock distribution circuit sensed by the monitoring circuit. ### Claim 7 (depends on 6) The integrated circuit of claim 6, wherein the at least one control circuit is configured to: control the at least one of the at least one function module of the plurality of function modules, the at least one clock generator, and the clock distribution circuit based on the specified control method by suing the mapping table. ### Claim 8 (depends on 1) The integrated circuit of claim 1, wherein the clock distribution circuit includes a plurality of nodes, and wherein the at least one control circuit is configured to: when operating statuses of the at least one clock generator and the plurality of nodes are maintained in a specified operating status during a time specified in advance, control the at least one of the at least one function module of the plurality of function modules, the at least one clock generator, and the clock distribution circuit based on a specified control method. ### Claim 9 (depends on 1) The integrated circuit of claim 1, wherein the at least one control circuit is configured to: control the at least one clock generator and the clock distribution circuit based on the specified control method such that a clock of a specified frequency is supplied to one or more function modules specified in advance from among the plurality of function modules. ### Claim 10 (depends on 1) The integrated circuit of claim 1, wherein at least one function module of a plurality of function modules includes a plurality of sub function modules, and wherein the specified control method is configured to turn on or off one or more sub function modules specified in advance from among a plurality of sub function modules. ### Claim 11 (depends on 1) The integrated circuit of claim 1, wherein the clock distribution circuit includes a plurality of nodes, and wherein the at least one control circuit is configured to: when operating statuses of the at least one clock generator and the plurality of nodes correspond to a specified operating status, determine a category to which a performance status of the integrated circuit corresponds. ### Claim 12 (depends on 11) The integrated circuit of claim 11, wherein the memory stores a mapping table including a category to which a performance status of the integrated circuit according to the operating statuses of the at least one clock generator and the clock distribution circuit detected by the monitoring circuit corresponds. ### Claim 13 (depends on 12) The integrated circuit of claim 12, wherein the at least one control circuit is configured to: determine the category, to which the performance status of the integrated circuit corresponds, by using the mapping table. ### Claim 14 (depends on 11) The integrated circuit of claim 11, wherein the category includes at least one of a video playback category, a game execution category, a web surfing category, or a music playback category.