# US 11,305,120 B2 · Monolithic neural interface system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,305,120 B2 - Document ID: US11305120B2 - Status: Granted - Kind: B2 - Application number: 16/765,587 - Filed: 2018-11-20 - Published: 2020-10-01 - Granted: 2022-04-19 - Earliest claimed: 2017-11-20 - Assignees: University of Central Florida Research Foundation, Inc. - Applicants: University of Central Florida Research Foundation, Inc. - Inventors: Brian Kim; Kevin White; Geoffrey Mulberry - Web page: https://patentgrep.com/patent/US11305120B2 ## CPC - A61N 1/36125: {Details of circuitry or electric components} - A61N 1/0529: {Electrodes for brain stimulation} - A61N 1/3605: {Implantable neurostimulators for stimulating central or peripheral nerve system} - A61N 1/37282: {characterised by communication with experts in remote locations using a network} - A61N 1/37288: {Communication to several implantable medical devices within one patient} - A61N 1/375: Constructional arrangements, e.g. casings - A61N 1/3787: {from an external energy source} - A61N 1/40: Applying electric fields by inductive or capacitive coupling (microwave apparatus A61N5/00); {Applying radio-frequency signals} - A61N: ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY (measurement of bioelectric currents A61B; surgical instruments, devices or methods for transferring non-mechanical forms of energy to or from the body A61B18/00; anaesthetic apparatus in general A61M; incandescent lamps H01K; infrared radiators for heating H05B) ## Abstract A device comprising monolithic substrates forming a chip including a wireless, battery-less monolithically-integrated neural interface (MINI) device. The chip comprises an integrated circuit (IC) being embedded in a first monolithic substrate and comprising a plurality of amplifiers configured to amplify received neural signals from a monitored subject, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal. The chip includes radio-frequency (RF) planar coils embedded in a second monolithic substrate, being electrically connected to the IC through the first monolithic substrate, being configured for wireless transmission of the multiplexed digital signal to a remote wireless device and being configured to receive wireless power signals to power the IC. A plurality of on-chip electrodes is included to directly sense the neural signals of the subject and provide the neural signals to the plurality of amplifiers. ## Claims ### Claim 1 A device comprising: a chip, the chip comprising: an integrated circuit (IC) being embedded in a frontplane layer and comprising a plurality of amplifiers configured to amplify received neural signals from a monitored subject, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal, the frontplane layer comprising an external surface; radio-frequency (RF) planar coils embedded in a backplane layer, and electrically connected to the IC, the RF planar coils being configured for wireless transmission of the multiplexed digital signal to a remote wireless device and being configured to receive wireless power signals to power the IC; and a plurality of on-chip electrodes integrated on a top layer of the integrated circuit and configured to directly sense the neural signals of the subject and provide the neural signals to the plurality of amplifiers, wherein the plurality of on-chip electrodes comprise a pillar electrode array or a planar electrode array with the plurality of on-chip electrodes comprising at least 1000 electrodes, wherein the chip comprising the frontplane layer, the backplane layer and the plurality of on-chip electrodes form a wireless, battery-less monolithically-integrated neural interface (MINI) device configured to be implanted. ### Claim 2 (depends on 1) The device of claim 1, further comprising conductive vias for electrically connecting the IC to the RF planar coils. ### Claim 3 (depends on 2) The device of claim 2, wherein each conductive vias comprising a through-silicon via. ### Claim 4 (depends on 2) The device of claim 2, wherein the integrated circuit comprises a top layer and a bottom layer, wherein the conductive vias are generally coupled to the top layer on opposite sides of the bottom layer. ### Claim 5 (depends on 1) The device of claim 1, wherein each on-chip electrode of the plurality of on-chip electrodes comprising a tungsten core and a gold plating surrounding the tungsten core. ### Claim 6 (depends on 1) The device of claim 1, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes. ### Claim 7 (depends on 1) The device of claim 1, wherein the RF planar coils comprise a first data communication coil and a second power receiving coil; the power receiving coil being operative with a capacitor and a voltage regulator for generating and supplying power to the IC; and the capacitor is coupled to the IC using conductive vias. ### Claim 8 A system comprising: a chip comprising: an integrated circuit (IC) being embedded in a frontplane layer and comprising a plurality of amplifiers configured to amplify received neural signals from a monitored subject, and a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal; radio-frequency (RF) planar coils embedded in a backplane layer and electrically connected to the IC, the RF planar coils being configured for wireless transmission of the multiplexed digital signal and being configured to receive wireless power signals to power the IC; and a plurality of on-chip electrodes integrated with the frontplane layer and configured to directly sense the neural signals of the subject and provide the neural signals to the plurality of amplifiers; and a prosthetic device having coupled thereto a computing device and an external power source and configured to be worn by the subject wherein the computing device receives the multiplexed digital signal and the external power source supplies the wireless power signals to the prosthetic device, wherein the prosthetic device comprises one or more actuators that are controlled based on the sensed neural signals from the plurality of on-chip electrodes; wherein the chip comprising the frontplane layer, the backplane layer and the plurality of on-chip electrodes form a wireless, battery-less monolithically-integrated neural interface (MINI) device configured to be implanted. ### Claim 9 (depends on 8) The system of claim 8, wherein the chip further comprising conductive vias for electrically connecting the IC to the RF planar coils. ### Claim 10 (depends on 9) The system of claim 9, wherein each conductive vias comprising a through-silicon via. ### Claim 11 (depends on 9) The system of claim 9, wherein the integrated circuit comprises a top layer and a bottom layer, wherein the conductive vias are generally coupled to the top layer on opposite sides of the bottom layer. ### Claim 12 (depends on 8) The system of claim 8, wherein each on-chip electrode of the plurality of on-chip electrodes comprising a tungsten core and a gold plating surrounding the tungsten core. ### Claim 13 (depends on 8) The system of claim 8, wherein the plurality of on-chip electrodes comprising one of a pillar electrode array and a planar electrode array. ### Claim 14 (depends on 13) The system of claim 13, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes. ### Claim 15 (depends on 8) The system of claim 8, wherein the RF planar coils comprise a first data communication coil and a second power receiving coil; the power receiving coil being operative with a capacitor and a voltage regulator for generating and supplying power to the IC; and the capacitor is coupled to the IC using conductive vias. ### Claim 16 A method comprising: manufacturing a chip for a wireless, battery-less monolithically-integrated neural interface (MINI) device, the manufacturing the chip comprising: embedding an integrated circuit (IC) comprising a plurality of amplifiers configured to amplify received neural signals from a monitored subject in a frontplane layer; embedding a radio data signal generator configured to process the amplified neural signals and generate a multiplexed digital signal; and embedding a radio-frequency (RF) planar coils in a backplane layer, the RF planar coils being electrically connected to the IC and configured for wireless transmission of the multiplexed digital signal to a remote wireless device and being configured to receive wireless power signals to power the IC; and on-chip integrating a plurality of on-chip electrodes on the chip, the plurality of on-chip electrodes configured to directly sense the neural signals of the subject and provide the neural signals to the plurality of amplifiers, wherein on-chip integrating comprises forming one of a pillar electrode array or a planar electrode array, and wherein the plurality of on-chip electrodes comprises at least 1000 electrodes. ### Claim 17 (depends on 16) The method of claim 16, further comprising forming a conductive vias for electrically connecting the IC to the RF planar coils. ### Claim 18 (depends on 17) The method of claim 17, wherein each conductive vias comprising a through-silicon via. ### Claim 19 (depends on 17) The method of claim 17, wherein the integrated circuit comprises a top layer and a bottom layer, wherein the conductive vias are generally coupled to the top layer on opposite sides of the bottom layer. ### Claim 20 (depends on 16) The method of claim 16, wherein the on-chip integrating of the plurality of on-chip electrodes includes for each on-chip electrode of the plurality of on-chip electrodes comprising forming a tungsten core and plating the tungsten core with gold plating surrounding the tungsten core. ### Claim 21 (depends on 16) The method of claim 16, wherein the on-chip integrating of the plurality of on-chip electrodes includes forming one of a pillar electrode array and a planar electrode array. ### Claim 22 (depends on 21) The method of claim 21, wherein the plurality of on-chip electrodes comprises one of 1000 electrodes and 1024 electrodes.